招聘
Required Skills
Digital Design
Verilog
Tcl
Perl
Shell scripting
RTL design
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. We apply our Intelligent System Design strategy to deliver software, hardware, and IP that turn design concepts into reality.
This strategy is supplemented by AI-augmented development practices throughout all our organizations to empower our team to focus on creative problem-solving and innovation. Our customers are the world’s most innovative companies, delivering extraordinary electronic products—from chips to boards to systems—for dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace, industrial, and health. Join us and be part of a culture that values innovation, collaboration, and customer success.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Job Title: Design Engineering Intern
Location: Cork
Job Overview: The Cadence Tensilica CPU Processor Team is seeing rapid adoption of our industry leading processor cores and DSP's. Our configurable and extensible processor cores are poised to meet the demands of intelligent IoT Devices at the edge of ML/AI Applications. We are already empowering many of the top chip and system companies with our Audio, Speech, AR/VR, ADAS, Vision and Imaging applications being driven with our processor cores. Today Cadence is shipping an astounding 8 billion processor cores annually and expanding into intelligent system design and development.
Cadence Tensilica CPU Processor Team is hiring engineering interns to join our R&D team in Cork, Ireland. This is an amazing opportunity to work as a Graduate Engineer at a world leader in computational software, semiconductor design IP, and system verification hardware. Our customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to complete systems for the most dynamic market applications including hyperscale computing, 5G communications, automotive, mobile, aerospace, consumer, industrial, and healthcare.
Come be part of this great Processor team where you can make an impact that is visible.
Job Responsibilities: Perform as a member of the Logic Design Team for Xtensa processors. Responsible for the RTL implementation of microprocessor cores, multiprocessor sub-systems and their peripherals. Implement the micro-architecture in Verilog RTL, simulate and debug its functions and run synthesis, place & route and other Electronic Design Automation scripts to meet timing, area, and power goals. Assist with developing test plans; writing functional diagnostics; debugging failures; and analyzing coverage information. Work closely with various Design Verification and Electronic Design Automation teams.
Position Requirements: • Pursuing Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a similar major.
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Deep understanding of Digital Design Fundamentals
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Excellent automation skills using Tcl, Perl, shell scripting
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Excellent oral and written communications skills
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Exposure to design automation tools is a plus
Cadence is committed to equal employment opportunity and employment equity throughout all levels of the organization. We strive to attract a qualified and diverse candidate pool and encourage diversity and inclusion in the workplace.
We’re doing work that matters. Help us solve what others can’t.
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About Cadence

Cadence
PublicCadence Design Systems provides electronic design automation (EDA) software, hardware, and IP for designing and verifying electronic systems and semiconductors.
5,001-10,000
Employees
San Jose
Headquarters
Reviews
3.3
7 reviews
Work Life Balance
2.0
Compensation
2.5
Culture
1.8
Career
2.0
Management
1.5
15%
Recommend to a Friend
Pros
Built strong client relationships
Useful for repetitive tasks
Employment opportunities
Cons
Poor management and micromanagement
Lack of career growth opportunities
Technical architecture and code quality issues
Salary Ranges
65 data points
Junior/L3
Mid/L4
Senior/L5
Intern
Junior/L3 · Associate
10 reports
$109,936
total / year
Base
$97,510
Stock
-
Bonus
$12,426
$64,329
$189,193
Interview Experience
1 interviews
Difficulty
3.0
/ 5
Duration
14-28 weeks
Interview Process
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Onsite/Virtual Interviews
5
Final Decision
Common Questions
Technical Knowledge
Behavioral/STAR
Past Experience
Problem Solving
News & Buzz
Cadence Design Systems (CDNS) Valuation Check After Lightmatter Photonic AI Partnership - simplywall.st
Source: simplywall.st
News
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5w ago
Cadence Design Systems: Riding The AI Supercycle, But With Expectations At The Limit - Seeking Alpha
Source: Seeking Alpha
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Cadence Design Systems, Inc. (CDNS): Analyst Consensus and Growth Potential in the Booming Technology Sector - DirectorsTalk Interviews
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Lightmatter AI Photonics Pact Might Change The Case For Investing In Cadence Design Systems (CDNS) - simplywall.st
Source: simplywall.st
News
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5w ago