
Leading company in the technology industry
Senior Principal Jasper Formal Verification AE
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
As a valued member of the North American Field Applications Engineering (AE) team, you will collaborate with prominent semiconductor and system companies to implement Cadence’s Jasper Formal Verification solutions. This dynamic, customer-facing position requires you to provide hands-on technical support throughout both the pre-sale and post-sale stages. By working closely with account teams and product developers, you will help address and resolve complex verification challenges for customers.
Your primary responsibilities include:
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Establishing technical credibility and building strong relationships with clients, who may range from newcomers to seasoned experts in formal verification.
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Your role involves delivering exceptional reactive support, proactive training, and expert consultation to ensure users derive maximum benefit from our products.
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Additionally, you’ll partner with R&D teams to introduce innovative formal flows and applications to customers, advocate for their needs, and assist in the development of competitive and inventive solutions.
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To maintain Cadence’s edge in the industry, you are expected to stay informed about the competitive landscape and continually seek ways to distinguish our offerings.
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Mentoring junior AE team members and fostering a collaborative, team-oriented environment is integral to this role.
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Representing Cadence at technical conferences and trade shows provides you an opportunity to showcase our expertise and connect with industry peers.
Success in this position requires:
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US Citizens preferred
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7+ years experience applying formal property-checking tools to various functional verification scenarios.
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Experience with simulation-based verification concepts such as transactors, scoreboards, and functional coverage models.
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A comprehensive understanding of RTL design, particularly the advanced features of System Verilog.
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Proficiency in UNIX, scripting languages like TCL, grid computing dispatchers, and EDA tool administration is also necessary.
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The ideal candidate is self-driven, capable of working independently with minimal supervision, and has strong communication and interpersonal skills are essential, as is relevant industry experience.
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An advanced degree in a related field is highly desirable.
The annual salary range for Massachusetts is $133,000 to $247,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
We’re doing work that matters. Help us solve what others can’t.
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Cadenceについて

Cadence
PublicCadence Design Systems, Inc. is an American multinational technology and computational software company headquartered in San Jose, California.
5,001-10,000
従業員数
San Jose
本社所在地
$8.5B
企業価値
レビュー
10件のレビュー
3.9
10件のレビュー
ワークライフバランス
3.8
報酬
2.7
企業文化
4.2
キャリア
3.2
経営陣
2.8
72%
知人への推奨率
良い点
Flexible work arrangements and remote options
Great company culture and collaborative team
Good benefits and job security
改善点
Below average compensation and salary
High workload and overwhelming at times
Limited career advancement opportunities
給与レンジ
75件のデータ
Junior/L3
Junior/L3 · Data Analyst
1件のレポート
$91,103
年収総額
基本給
$85,276
ストック
-
ボーナス
$5,827
$59,612
$139,984
面接レビュー
レビュー1件
難易度
3.0
/ 5
期間
14-28週間
面接プロセス
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Onsite/Virtual Interviews
5
Final Decision
よくある質問
Technical Knowledge
Behavioral/STAR
Past Experience
Problem Solving
最新情報
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