招聘
福利待遇
•401(k)
•Equity
•Healthcare
必备技能
Digital Synthesis
Place and Route
Static Timing Analysis
Scripting
Leadership
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Key Responsibilities
- Lead technical strategy and execution for critical customer design projects, influencing design methodologies and implementation flows at advanced nodes (3nm and below)
- Partner with sales teams to grow Cadence business by showcasing Cadence’s leadership in digital implementation.
- Serve as a primary consultant for advanced-node design synthesis & implementation, Agentic-AI and signoff, leveraging deep expertise in synthesis, place & route, CTS, floor planning, timing signoff, design convergence with timing closure, and power optimization as key aspects.
- Develop and deploy custom solutions using scripting languages (TCL, PERL, Python) to address unique customer requirements.
- Mentor and guide junior engineers, fostering technical excellence and knowledge sharing across teams.
-
- Qualifications
- Bachelor’s or Master’s in Electrical/Computer Engineering.
- 2+ years of hands-on experience in physical implementation and signoff at 7nm and below, with multiple successful tapeouts.
- Demonstrated expertise in digital synthesis, place-and-route, static timing analysis, AI in EDA, and achieving timing and power goals for advanced node designs.
- Strong debugging skills with the ability to isolate and resolve critical design issues efficiently.
- Proficiency in scripting for automation and flow customization.
- Exceptional communication and leadership skills, with a track record of building strong customer relationships.
The annual salary range for California is $84,000 to $156,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
We’re doing work that matters. Help us solve what others can’t.
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关于Cadence

Cadence
PublicCadence Design Systems provides electronic design automation (EDA) software, hardware, and IP for designing and verifying electronic systems and semiconductors.
5,001-10,000
员工数
San Jose
总部位置
$8.5B
企业估值
评价
4.0
10条评价
工作生活平衡
4.2
薪酬
2.8
企业文化
4.1
职业发展
3.2
管理层
3.4
72%
推荐给朋友
优点
Good work-life balance
Supportive and collaborative team environment
Flexible work arrangements
缺点
Below market compensation
Limited career advancement opportunities
Heavy workload and long hours
薪资范围
58个数据点
Junior/L3
Junior/L3 · Data Analyst
1份报告
$91,103
年薪总额
基本工资
$85,276
股票
-
奖金
$5,827
$59,612
$139,984
面试经验
1次面试
难度
3.0
/ 5
时长
14-28周
面试流程
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Onsite/Virtual Interviews
5
Final Decision
常见问题
Technical Knowledge
Behavioral/STAR
Past Experience
Problem Solving
新闻动态
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3d ago
Moran Wealth Management LLC Sells 19,592 Shares of Cadence Design Systems, Inc. $CDNS - MarketBeat
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Cadence Maps Its Future Beyond EDA With Agentic AI and Simulation - HPCwire
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