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Cadence
Cadence

Leading company in the technology industry

Sr Principal Emulation Application Engineer

职能工程
级别Staff+
地点SAN JOSE
方式现场办公
类型全职
发布1周前
立即申请

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

At Cadence, we hire and develop innovators and leaders who want to make an impact on the world of technology.

We offer amazing opportunities to grow, no matter where you are in your career. The ideal candidate will be energetic, innovative and enthusiastic about how to help customers solve their toughest verification problems using Cadence technology. Join our elite application engineering team for verification to work closely with the best AEs, PEs and R&D in EDA at a company listed in Fortune magazine and Great Place to Work as one of the World's Best Workplaces™ year after year!

As an integral member of the North America Verification Field Applications Engineering (AE) Team, you will work directly with industry leading semiconductor and system companies to deploy Cadence’s market leading emulation and FPGA prototyping platforms, Palladium and Protium. In this customer facing role you will provide the front line technical support in the pre and post-sales process and will work with account teams to come up with innovative solutions to address our customers’ most challenging problems in emulation and prototyping. You will own customer success!

In this role, you will develop customer specific emulation and prototyping requirements, including advanced acceleration component development, methodology support, and operation and maintenance of Cadence’s emulation and prototyping tools and services. You will support technical evaluations and benchmark development for Cadence’s market leading tools such as Palladium acceleration and emulation platform and Protium prototyping platform. You will create and conduct technical presentations and product demonstrations for customers.

Requirements;

Minimum:

8+ years industry experience

Experience in HW acceleration, in-circuit emulation or FPGA prototyping

Experience with multiple clock domains and asynchronous interfaces

Knowledge of the FPGA development process & tool flow from RTL to bitstream for Xilinx and/or Altera products

Hands on experience with lab bring up, debug, chipscope and instrument usage

Experience with C/C++/SystemC

Knowledge of fundamental So

C Architecture knowledge:

BS, MS, or PhD degree in Computer Science/Engineering, Electrical, Engineering, or related field

Strong RTL and Testbench debug skills:

Experience in synthesizable coding style

Experience in writing scripts (Perl, Python or Tcl)

Strong software, HDL design and verification skills

Experience with System Verilog, VHDL, Verilog, C/C++/SystemC

Ability to quickly analyze verification environments and design complexity

Strong verbal and written communication skills

Strong teamwork skills

Ability to interact effectively with both external customers and R&D teams

At Cadence, customers are at the heart of everything we do. Talented engineers like you are what enable us to materialize this passion into results. By working directly with Cadence R&D and driving customer engagements, you will enhance your in-depth knowledge in verification tools, unlock unique expertise in verification methodologies, and level up your communication, customer, and sales skills. No matter where you are in your career, whether your next career step is to stay on the technical track, move up in management, or explore sales/marketing career opportunities, the skills and expertise you gain as an Application Engineer here at Cadence will put you miles ahead in your career advancement.

The annual salary range for California is $143,500 to $266,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

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关于Cadence

Cadence

Cadence

Public

Cadence Design Systems, Inc. is an American multinational technology and computational software company headquartered in San Jose, California.

5,001-10,000

员工数

San Jose

总部位置

$8.5B

企业估值

评价

10条评价

3.9

10条评价

工作生活平衡

3.8

薪酬

2.7

企业文化

4.2

职业发展

3.2

管理层

2.8

72%

推荐率

优点

Flexible work arrangements and remote options

Great company culture and collaborative team

Good benefits and job security

缺点

Below average compensation and salary

High workload and overwhelming at times

Limited career advancement opportunities

薪资范围

75个数据点

Junior/L3

Junior/L3 · Data Analyst

1份报告

$91,103

年薪总额

基本工资

$85,276

股票

-

奖金

$5,827

$59,612

$139,984

面试评价

1条评价

难度

3.0

/ 5

时长

14-28周

面试流程

1

Application Review

2

Recruiter Screen

3

Technical Phone Screen

4

Onsite/Virtual Interviews

5

Final Decision

常见问题

Technical Knowledge

Behavioral/STAR

Past Experience

Problem Solving