
Leading company in the technology industry
Senior Principal Software Engineer
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Join our R&D team building next‑gen **Accelerated Verification IP (AVIP)**and Virtual Bridge solutions for high‑performance IO and memory coherence. You’ll architect, implement, and productize PCIe Gen7 and CXL 2.0/3.x features across C++, UVM and virtualized system models that enable hardware, emulation, and hybrid platforms.
What you’ll do
- Design and enhance PCIe/CXL AVIP (agents, monitors, scoreboards, sequencers, coverage, error injection).
- Develop Virtual Bridge components that connect virtual platforms/emulators/FW to RTL (traffic modeling, performance, debug).
- Own feature bring‑up for CXL.io / CXL.cache / CXL.mem, IDE/security, RAS, switching/fabric (CXL 3.x).
- Deliver compliance and interoperability scenarios; drive customer escalations and cross‑team integration.
What you’ll need
-
BS with a minimum of 10 years of experience OR MS with a minimum of 7 years of experience OR PhD with a minimum of 5 years of experience
-
Experience with PCIe and/or CXL design/verification, deep protocol‑layer knowledge (LTSSM, DLL/TLP, flow control, ordering).
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Proficiency in VerilogRTL design and debug
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Experience with emulation/acceleration or hybrid (virtual + RTL) flows; solid debug skills (waveforms, checkers, coverage).
Nice to have
- PCIe Gen6/CXL 3.x fabric features (multi‑level switching, global fabric attach, pooling).
- Performance modeling, QoS/traffic shaping; firmware/OS driver bring‑up exposure; compliance tools.
The annual salary range for California is $154,000 to $286,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
We’re doing work that matters. Help us solve what others can’t.
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关于Cadence

Cadence
PublicCadence Design Systems, Inc. is an American multinational technology and computational software company headquartered in San Jose, California.
5,001-10,000
员工数
San Jose
总部位置
$8.5B
企业估值
评价
10条评价
3.9
10条评价
工作生活平衡
3.8
薪酬
2.7
企业文化
4.2
职业发展
3.2
管理层
2.8
72%
推荐率
优点
Flexible work arrangements and remote options
Great company culture and collaborative team
Good benefits and job security
缺点
Below average compensation and salary
High workload and overwhelming at times
Limited career advancement opportunities
薪资范围
75个数据点
Junior/L3
Junior/L3 · Data Analyst
1份报告
$91,103
年薪总额
基本工资
$85,276
股票
-
奖金
$5,827
$59,612
$139,984
面试评价
1条评价
难度
3.0
/ 5
时长
14-28周
面试流程
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Onsite/Virtual Interviews
5
Final Decision
常见问题
Technical Knowledge
Behavioral/STAR
Past Experience
Problem Solving
最新动态
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1w ago
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News
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