採用
福利厚生
•Learning
•Parental Leave
•Healthcare
必須スキル
TypeScript
JavaScript
PostgreSQL
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
We are seeking a Lead Solutions Engineer specializing in** runset enablement** to support advanced semiconductor technologies. This role is critical for timely delivery of physical verification solutions by providing full-time coverage in the U.S. time zone. You will lead development and validation of Pegasus** DRC and LVS runsets**, collaborate with R&D on CCRs, and enable customer adoption through robust automation and best practices.
Key Responsibilities
- Lead development and validation of Pegasus DRC and LVS runsets for advanced nodes.
- Architect automation frameworks for regression execution, issue detection, and validation reporting.
- Collaborate with R&D to resolve CCRs, influence product roadmap, and implement performance improvements.
- Provide technical enablement and support for customers on tool usage and advanced methodologies.
- Mentor junior engineers and establish best practices for runset development and QA.
- Work closely with internal teams to ensure timely delivery of verification solutions.
Qualifications
- MS degree with 5+ years of experience or PhD with 3+ years in Electrical Engineering, Computer Science, or related field.
- Strong understanding of semiconductor design and physical verification flows.
Experience and Technical Skills
- Proven expertise in developing and validating DRC and LVS runsets for Pegasus or similar tools (Calibre, ICV, Assura).
- Good-to-have: Experience with PERC and Fill runsets.
- Deep knowledge of advanced process technologies and methodologies (Ground Rules, Smart Fill, ESD).
- Proficiency in scripting languages (TCL, Python, Perl) and Linux/Unix environments.
- Familiarity with chip fabrication processes and multi-die integration challenges.
- Experience in automation frameworks for regression and validation.
Behavioral Skills
- Strong leadership and mentoring capabilities.
- Excellent written, verbal, and presentation skills.
- Ability to influence cross-functional teams and drive strategic initiatives.
- Innovative mindset to explore unconventional solutions and optimize workflows.
- Operate with integrity and foster collaboration across global teams.
Cadence is committed to equal employment opportunity and employment equity throughout all levels of the organization. We strive to attract a qualified and diverse candidate pool and encourage diversity and inclusion in the workplace.
We’re doing work that matters. Help us solve what others can’t.
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0
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Cadenceについて

Cadence
PublicCadence Design Systems provides electronic design automation (EDA) software, hardware, and IP for designing and verifying electronic systems and semiconductors.
5,001-10,000
従業員数
San Jose
本社所在地
$8.5B
企業価値
レビュー
4.0
10件のレビュー
ワークライフバランス
4.2
報酬
2.8
企業文化
4.1
キャリア
3.2
経営陣
3.4
72%
友人に勧める
良い点
Good work-life balance
Supportive and collaborative team environment
Flexible work arrangements
改善点
Below market compensation
Limited career advancement opportunities
Heavy workload and long hours
給与レンジ
58件のデータ
Junior/L3
Junior/L3 · Data Analyst
1件のレポート
$91,103
年収総額
基本給
$85,276
ストック
-
ボーナス
$5,827
$59,612
$139,984
面接体験
1件の面接
難易度
3.0
/ 5
期間
14-28週間
面接プロセス
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Onsite/Virtual Interviews
5
Final Decision
よくある質問
Technical Knowledge
Behavioral/STAR
Past Experience
Problem Solving
ニュース&話題
Ninety One UK Ltd Cuts Position in Cadence Design Systems, Inc. $CDNS - MarketBeat
MarketBeat
News
·
3d ago
Moran Wealth Management LLC Sells 19,592 Shares of Cadence Design Systems, Inc. $CDNS - MarketBeat
MarketBeat
News
·
3d ago
Cadence Maps Its Future Beyond EDA With Agentic AI and Simulation - HPCwire
HPCwire
News
·
4d ago
Lesser-Known Cadence Design Systems Just Landed Google and Nvidia Deals. Should You Buy CDNS Stock? - Barchart.com
Barchart.com
News
·
4d ago