
Leading company in the technology industry
Product Engineer II - Memory IP
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Product Engineer – Memory IP Products
Join a growing and dynamic IP team and help lead the proliferation of best-in-class Memory PHY IP products across a wider range of customers. This is a tremendous opportunity to work with an experienced team focusing on development and support of high-performance IP related to memory protocols such as DDR/LPDDR/HBM/GDDR, and to engage with the technology sector’s top companies making an impact in our world.
The role will be a key member of technical staff in an organization responsible for activities including but not limited to pre-sales engagement with potential customers and post-sales technical support for integration, usage, and deployment of memory physical IP producs. This candidate will be the primary interface between customers, CDNS R&D and System Validation teams. Candidate should possess strong communication skills with ability to manage multiple priorities on a day-to-day basis. Ownership of tasks, ability to collaborate with remote teams located worldwide and clear oral and written communication skills are must-have attributes in this role.
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Primary Responsibilities:
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Supporting pre-silicon integration, usage, and implementation of memory subsystem products
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Helping with internal system integration and QA testing of memory subsystem products (Controller + PHY)
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Analyzing and resolving complex subsystem application or implementation issues and providing professional guidance to customers
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Supporting various memory PHY and controller SOC integration reviews and implementation reviews
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Assisting customers with RTL and gate-level simulations to verify functionality
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Assisting customers with timing closure and other aspects of physical integration
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Participating in development and refinement of product documentation and checklists for customer applications
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Supporting post-silicon bringup and production test activities for customers as needed
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Enhancing customer experience by providing prompt, thorough, and technically accurate responses to customer questions
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Leveraging AI-powered tools and assistants to enhance productivity, improve decision making, and maintain high-quality customer deliverables.
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Applying AI-powered analytics tools to extract insights, identify patterns, and generate actionable recommendations from complex datasets
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Position Requirements:
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B.S Electrical/Computer Engineering (or similar degree) with minimum 2 years of relevant industry experience OR M.S Electrical/Computer Engineering (or similar degree)
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Experience working with DDR5/4/3, LPDDR5/4/3, HBM3, GDDR6 or similar IPs
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Verilog RTL design and gate level verification experience
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Synthesis and static timing analysis experience (physical implementation/verification experience is a plus)
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Familiarity with industry standard DFT flows and test methodologies.
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Familiarity with package and board design
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Ability to read schematics and participate in SI/PI reviews for customer board/package implementation
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Preferred Qualifications
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M.S Electrical/Computer Engineering (or similar degree) with 2+ years of relevant industry experience
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Experience with Memory PHY and DSP based architecture
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Experience with embedded microcontroller FW
We’re doing work that matters. Come join our growing team and help us solve problems that others can’t.
We’re doing work that matters. Help us solve what others can’t.
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Cadenceについて

Cadence
PublicCadence Design Systems, Inc. is an American multinational technology and computational software company headquartered in San Jose, California.
5,001-10,000
従業員数
San Jose
本社所在地
$8.5B
企業価値
レビュー
10件のレビュー
3.9
10件のレビュー
ワークライフバランス
3.8
報酬
2.7
企業文化
4.2
キャリア
3.2
経営陣
2.8
72%
知人への推奨率
良い点
Flexible work arrangements and remote options
Great company culture and collaborative team
Good benefits and job security
改善点
Below average compensation and salary
High workload and overwhelming at times
Limited career advancement opportunities
給与レンジ
75件のデータ
Junior/L3
Junior/L3 · Data Analyst
1件のレポート
$91,103
年収総額
基本給
$85,276
ストック
-
ボーナス
$5,827
$59,612
$139,984
面接レビュー
レビュー1件
難易度
3.0
/ 5
期間
14-28週間
面接プロセス
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Onsite/Virtual Interviews
5
Final Decision
よくある質問
Technical Knowledge
Behavioral/STAR
Past Experience
Problem Solving
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