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채용Cadence

Lead Application Engineer

Cadence

Lead Application Engineer

Cadence

BANGALORE

·

On-site

·

Full-time

·

2mo ago

필수 스킬

Analog layout design

Virtuoso

IC design

Physical verification

Skill scripting

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

  • Your role will be to meet customers/prospects and identify & qualify the opportunities, work out agreeable, equally importantly achievable, evaluation criteria, run through the evaluation and convert the opportunities into business and help customers to deploy the tool and get it running into production at the earliest. It requires a very good understanding of customer flow and a good analytical ability to resolve issues impacting production schedule.
  • Hands–on knowledge of Advance Node layout and design rules would be a plus.
  • The role demands a close interaction with R&D and Product Engineering team for implementation of new features and bug fixes.
  • As the job requires an extensive interaction with customers for issue resolution and identifying opportunities to proliferate Cadence technologies, at the same time a closer interaction with R&D and other stakeholders, it demands an excellent customer and communication skills, and the leadership qualities.
  • This position requires solid understanding of IC design technology and foundry process/methodology in analog layouts.
  • It is essential to have a very good understanding of analog layout design fundamentals, advance node virtuoso techfile constraints and in-depth knowledge and hands-on experience on writing skill scripts to perform various layout automation tasks.
  • The candidate should have knowledge of complete analog back-end flow from top level floorplanning down to complex block level layouts, physical verification, extraction, EMIR analysis etc, with proficiency in Cadence layout tools specifically Virtuoso with advance node exposure.
  • Prior Design experience using Cadence CustomIC Physical Design tools (Virtuoso) and flows including chip integration and signoff is an added advantage.
    • B.Tech or equivalent with 3 to 7 years of relevant experience.

We’re doing work that matters. Help us solve what others can’t.

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총 지원 클릭 수

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모의 지원자 수

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Cadence 소개

Cadence

Cadence

Public

Cadence Design Systems provides electronic design automation (EDA) software, hardware, and IP for designing and verifying electronic systems and semiconductors.

5,001-10,000

직원 수

San Jose

본사 위치

$8.5B

기업 가치

리뷰

4.0

10개 리뷰

워라밸

4.2

보상

2.8

문화

4.1

커리어

3.2

경영진

3.4

72%

친구에게 추천

장점

Good work-life balance

Supportive and collaborative team environment

Flexible work arrangements

단점

Below market compensation

Limited career advancement opportunities

Heavy workload and long hours

연봉 정보

58개 데이터

Junior/L3

Junior/L3 · Data Analyst

1개 리포트

$91,103

총 연봉

기본급

$85,276

주식

-

보너스

$5,827

$59,612

$139,984

면접 경험

1개 면접

난이도

3.0

/ 5

소요 기간

14-28주

면접 과정

1

Application Review

2

Recruiter Screen

3

Technical Phone Screen

4

Onsite/Virtual Interviews

5

Final Decision

자주 나오는 질문

Technical Knowledge

Behavioral/STAR

Past Experience

Problem Solving