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At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Cadence
is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
- The Cadence Advantage
- The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact.
- Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees.
- The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer success
- Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests
- You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day.
Job Overview: Role: — Perspec Tool and Libraries Product Engineering Key Responsibilities:
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Lead the development and enhancement of the Perspec System Verifier tool and its associated libraries.
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Collaborate closely with R&D teams to design, implement, and improve verification methodologies and product features.
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Work with field application engineers and end customers to understand their verification challenges and provide effective solutions using Perspec tools and libraries.
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Drive the integration of Perspec with various verification environments, including ARM, RISC-V, PCIe, and performance verification domains.
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Provide technical leadership in one or more verification domains such as:
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ARM Architecture: Multi-core coherency, power management, memory subsystem, exception handling, and advanced power scenarios.
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RISC-V Architecture: PMP (Physical Memory Protection), privilege modes, cache coherency, and exception level transitions.
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PCI Express (PCIe): Root Complex and Endpoint configuration, DMA operations, interrupts (MSI/MSI-X), power management, error injection, and advanced PCIe features.
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Performance Verification: Industry-standard benchmarks (Core Mark, Dhrystone, LMbench), adaptive traffic profiles, and system performance analysis.
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Other Protocols: AMBA CHI, ACE-Lite, and other SoC protocols with emphasis on multi-core verification.
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Lead product engineering efforts to ensure the tool and libraries meet customer needs and industry standards.
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Support and guide the development of reusable verification scenarios and test suites.
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Participate in customer engagements, providing expert advice and troubleshooting complex verification issues.
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Mentor and coach junior engineers and cross-functional teams on Perspec tool usage and best practices.
Preferred Skills and Experience:
- Strong background in product engineering or verification tool development.
- Deep understanding of SoC verification challenges across ARM, RISC-V, PCIe, and performance domains.
- Experience collaborating with R&D, field application engineers, and customers.
- Familiarity with multi-threaded and multi-executable verification environments.
- Excellent communication and leadership skills.
- Ability to translate customer requirements into product features and verification solutions.
We’re doing work that matters. Help us solve what others can’t.
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关于Cadence

Cadence
PublicCadence Design Systems provides electronic design automation (EDA) software, hardware, and IP for designing and verifying electronic systems and semiconductors.
5,001-10,000
员工数
San Jose
总部位置
$8.5B
企业估值
评价
4.0
10条评价
工作生活平衡
4.2
薪酬
2.8
企业文化
4.1
职业发展
3.2
管理层
3.4
72%
推荐给朋友
优点
Good work-life balance
Supportive and collaborative team environment
Flexible work arrangements
缺点
Below market compensation
Limited career advancement opportunities
Heavy workload and long hours
薪资范围
58个数据点
Junior/L3
Junior/L3 · Data Analyst
1份报告
$91,103
年薪总额
基本工资
$85,276
股票
-
奖金
$5,827
$59,612
$139,984
面试经验
1次面试
难度
3.0
/ 5
时长
14-28周
面试流程
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Onsite/Virtual Interviews
5
Final Decision
常见问题
Technical Knowledge
Behavioral/STAR
Past Experience
Problem Solving
新闻动态
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