At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadence

is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.

The Cadence Advantage

• The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact.
• Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees.
• The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer success
• Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests

You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day

Job Responsibilities:

EXp:2- 5 Years

• Physical design implementation of state-of-the-art Cadence IPs using Cadence EDA tools
• Genus, Innovus, Tempus, Voltus and other backend tools.

PPA characterization and optimization of these performance-oriented and power-oriented best-in-class IP cores for advanced process nodes, such as 7nm/5nm/3nm/2nm and beyond.

Development, automation and maintenance of EDA flows and scripts for physical implementation.

Manage regression infrastructure that tracks quality of the RTL/flow development as well as the PPA of the key designs.

Participate in benchmarking PPAs for customer engagements.

Should have knowledge of complete ASIC Design Flow, including Synthesis, Physical Designing , Timing Analysis, Power Analysis and Formal Verification.

Experience with Cadence digital design tools will be an added advantage.

Hands on scripting languages like Python, Perl, TCL, Unix shell, etc.

Strong understanding of digital logic design, processor design, and computer architecture is desirable.

Should have excellent communication, analytical and problem solving skills.

Should be self-motivated and good team player.

We’re doing work that matters. Help us solve what others can’t.