
Leading company in the technology industry
Product Engineer II – System Verification and Emulation
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Cadence Design Systems Inc. is looking for a motivated Product Engineer II – System Verification and Emulation to work with us in Belo Horizonte, Brazil.
As a Product Engineer II – System Verification and Emulation, you will play a key role in advancing verification methodologies using Hardware Emulation. You will work independently across multiple internal teams and directly with customers to drive Palladium adoption, optimize verification flows, and influence product direction. The objective is to increase customer productivity by enabling scalable, robust, and innovative verification solutions using cutting‑edge emulation technologies.
Cadence has been nominated as a Great Place to Work globally and in Brazil and is also a Fortune 100 Best Companies to Work For.
Job Description:
- Enable deployment of hardware emulation and verification technologies in customer flows to support product adoption and customer success
- Analyze customer verification use cases and workflows to identify opportunities for improved usage, performance, and productivity in Hardware assisted verification
- Execute targeted experiments, validation, and testing to demonstrate new features, capabilities, and supported use cases
- Develop and maintain technical collateral, examples, and reference flows to support internal teams and customer engagements
- Collaborate with R&D, field, and support teams to reproduce, analyze, and resolve customer‑reported issues
- Contribute hands‑on to modeling, testing, and validation activities to ensure product specifications meet real‑world requirements
Requirements:
- Bachelor’s or Master’s degree in Computer Science, Electrical Engineering, or a related field, or equivalent practical experience
- 2 years of relevant industry experience in system verification, hardware-assisted verification, emulation, or related domains
- Strong understanding of digital logic design and hands-on experience with Verilog/System Verilog
- Programming experience in C/C++ and Python,
- Practical experience with RTL simulation-based verification and hardware emulation and/or rapid prototyping platforms
- Working knowledge of Linux-based development environments and common EDA workflows
- Strong analytical, problem-solving, and root-cause analysis skills
- Effective written and verbal communication skills in English, with the ability to collaborate across multiple teams
Nice to Have:
- Course or project work with FPGA based designs and verification
Additional Job Details:
- Employment category: CLT
- Employment term: 40 hours/week.
- Competitive benefits.
- Location: Av Contorno 5800, Belo Horizonte, Minas Gerais Brazil.
Cadence is the only company that provides the expertise and tools, IP, and hardware required for the entire electronics design chain, from chip design to chip packaging to boards and to systems. We enable electronic systems and semiconductor companies to create innovative products that transform the way people live, work, and play. Our products are used in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments.
For more information, access http://www.cadence.com
We’re doing work that matters. Help us solve what others can’t.
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关于Cadence

Cadence
PublicCadence Design Systems, Inc. is an American multinational technology and computational software company headquartered in San Jose, California.
5,001-10,000
员工数
San Jose
总部位置
$8.5B
企业估值
评价
10条评价
3.9
10条评价
工作生活平衡
3.8
薪酬
2.7
企业文化
4.2
职业发展
3.2
管理层
2.8
72%
推荐率
优点
Flexible work arrangements and remote options
Great company culture and collaborative team
Good benefits and job security
缺点
Below average compensation and salary
High workload and overwhelming at times
Limited career advancement opportunities
薪资范围
75个数据点
Junior/L3
Junior/L3 · Data Analyst
1份报告
$91,103
年薪总额
基本工资
$85,276
股票
-
奖金
$5,827
$59,612
$139,984
面试评价
1条评价
难度
3.0
/ 5
时长
14-28周
面试流程
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Onsite/Virtual Interviews
5
Final Decision
常见问题
Technical Knowledge
Behavioral/STAR
Past Experience
Problem Solving
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