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职位Cadence

Principal Design Engineer

Cadence

Principal Design Engineer

Cadence

BANGALORE

·

On-site

·

Full-time

·

2mo ago

福利待遇

Healthcare

Parental Leave

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

This role is for an analog/mixed signal design engineer.  The candidate will contribute to specification definition, design, and verification of block level designs, along with necessary design reviews.

Requirements:

5 years and relevant master’s degree or 7 years and relevant bachelor’s degree

Solid theoretical and practical experience in analog circuit design

Good understanding and design experience in PLLs, clocking and high-speed interfaces

Good familiarity with EDA tools, preferably Cadence

Good communication and presentation skills

We’re doing work that matters. Help us solve what others can’t.

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关于Cadence

Cadence

Cadence

Public

Cadence Design Systems provides electronic design automation (EDA) software, hardware, and IP for designing and verifying electronic systems and semiconductors.

5,001-10,000

员工数

San Jose

总部位置

$8.5B

企业估值

评价

4.0

10条评价

工作生活平衡

4.2

薪酬

2.8

企业文化

4.1

职业发展

3.2

管理层

3.4

72%

推荐给朋友

优点

Good work-life balance

Supportive and collaborative team environment

Flexible work arrangements

缺点

Below market compensation

Limited career advancement opportunities

Heavy workload and long hours

薪资范围

58个数据点

Junior/L3

Junior/L3 · Data Analyst

1份报告

$91,103

年薪总额

基本工资

$85,276

股票

-

奖金

$5,827

$59,612

$139,984

面试经验

1次面试

难度

3.0

/ 5

时长

14-28周

面试流程

1

Application Review

2

Recruiter Screen

3

Technical Phone Screen

4

Onsite/Virtual Interviews

5

Final Decision

常见问题

Technical Knowledge

Behavioral/STAR

Past Experience

Problem Solving