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At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Software Engineer – Optimization and Flow Team (Cadence Innovus)
This position is within the Optimization and Flow team of Cadence’s Innovus product. Our key R&D group focuses on timing and power optimization and flow convergence.
Innovus is the premier physical design solution used by leading semiconductor companies in areas such as mobile, automotive, CPU & GPU cores, and AI. The work done by this high-performance team has a significant impact on the chip industry and on products used in everyday life.
We are seeking talented engineers with a strong background in electronic design automation (EDA)—including timing, power analysis, and optimization—combined with excellent software engineering skills and experience in multithreaded and distributed optimization. If you are passionate about making breakthroughs in technology and driving innovation that shapes the industry, we want you on our team.
The successful candidate will possess the following combination of education and experience:
- MS in Computer Science or Electrical Engineering
- Proficient in C/C++
- Strong programming and software engineering skills
- Experience with UNIX/Linux platforms (preferred)
- Knowledge of Tcl (preferred)
- Experience with multithreaded and/or distributed programming (preferred)
- Prior experience with large-scale software development projects (preferred)
- Prior experience with timing analysis/optimization software development (preferred)
- Strong ability to learn and adapt
- Excellent analytical and problem-solving skills
- Good communication skill is preferred as the development team is distributed
Most importantly, we are looking for hard working, innovative engineers who enjoy working with a great team in a high-performance culture.
We’re doing work that matters. Help us solve what others can’t.
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0
模擬応募者数
0
スクラップ
0
類似の求人
Cadenceについて

Cadence
PublicCadence Design Systems provides electronic design automation (EDA) software, hardware, and IP for designing and verifying electronic systems and semiconductors.
5,001-10,000
従業員数
San Jose
本社所在地
$8.5B
企業価値
レビュー
4.0
10件のレビュー
ワークライフバランス
4.2
報酬
2.8
企業文化
4.1
キャリア
3.2
経営陣
3.4
72%
友人に勧める
良い点
Good work-life balance
Supportive and collaborative team environment
Flexible work arrangements
改善点
Below market compensation
Limited career advancement opportunities
Heavy workload and long hours
給与レンジ
58件のデータ
Junior/L3
Junior/L3 · Data Analyst
1件のレポート
$91,103
年収総額
基本給
$85,276
ストック
-
ボーナス
$5,827
$59,612
$139,984
面接体験
1件の面接
難易度
3.0
/ 5
期間
14-28週間
面接プロセス
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Onsite/Virtual Interviews
5
Final Decision
よくある質問
Technical Knowledge
Behavioral/STAR
Past Experience
Problem Solving
ニュース&話題
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News
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2d ago
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3d ago


