招聘
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
As a valued member of the North American Field Applications Engineering (AE) team, you will collaborate with prominent semiconductor and system companies to implement Cadence’s Jasper Formal Verification solutions. This dynamic, customer-facing position requires you to provide hands-on technical support throughout both the pre-sale and post-sale stages. By working closely with account teams and product developers, you will help address and resolve complex verification challenges for customers.
Your primary responsibilities include:
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Establishing technical credibility and building strong relationships with clients, who may range from newcomers to seasoned experts in formal verification.
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Your role involves delivering exceptional reactive support, proactive training, and expert consultation to ensure users derive maximum benefit from our products.
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Additionally, you’ll partner with R&D teams to introduce innovative formal flows and applications to customers, advocate for their needs, and assist in the development of competitive and inventive solutions.
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To maintain Cadence’s edge in the industry, you are expected to stay informed about the competitive landscape and continually seek ways to distinguish our offerings.
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Mentoring junior AE team members and fostering a collaborative, team-oriented environment is integral to this role.
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Representing Cadence at technical conferences and trade shows provides you an opportunity to showcase our expertise and connect with industry peers.
Success in this position requires:
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A comprehensive understanding of RTL design, particularly the advanced features of System Verilog.
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You should possess deep expertise in applying formal property-checking tools to various functional verification scenarios. Strong communication and interpersonal skills are essential, as is familiarity with simulation-based verification concepts such as transactors, scoreboards, and functional coverage models.
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Proficiency in UNIX, scripting languages like TCL, grid computing dispatchers, and EDA tool administration is also necessary.
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The ideal candidate is self-driven, capable of working independently with minimal supervision, and has at least seven years of relevant industry experience.
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An advanced degree in a related field is highly desirable.
The annual salary range for California is $143,500 to $266,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
We’re doing work that matters. Help us solve what others can’t.
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关于Cadence

Cadence
PublicCadence Design Systems provides electronic design automation (EDA) software, hardware, and IP for designing and verifying electronic systems and semiconductors.
5,001-10,000
员工数
San Jose
总部位置
$8.5B
企业估值
评价
4.0
10条评价
工作生活平衡
4.2
薪酬
2.8
企业文化
4.1
职业发展
3.2
管理层
3.4
72%
推荐给朋友
优点
Good work-life balance
Supportive and collaborative team environment
Flexible work arrangements
缺点
Below market compensation
Limited career advancement opportunities
Heavy workload and long hours
薪资范围
58个数据点
Junior/L3
Junior/L3 · Data Analyst
1份报告
$91,103
年薪总额
基本工资
$85,276
股票
-
奖金
$5,827
$59,612
$139,984
面试经验
1次面试
难度
3.0
/ 5
时长
14-28周
面试流程
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Onsite/Virtual Interviews
5
Final Decision
常见问题
Technical Knowledge
Behavioral/STAR
Past Experience
Problem Solving
新闻动态
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