招聘
必备技能
Python
SQL
Linux
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.
Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Job Overview:
- Software Engineer needed for development and support of tools for next generation physical verification tools and products
Job Responsibilities:
-
The Physical Verification R&D Software Engineering role is a multi-faceted position encapsulating a mix of physical verification software development, algorithm development, software debugging, performance optimization and accuracy analysis.
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R&D engineers collaborate with a large team of EDA professionals across multiple cultures to create and deliver best in class next generation software for physical IC application.
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R&D engineers work on complex applications which interface with other applications in a large suite of highly connected applications to enable next-generation physical verification solutions with superior performance and usability.
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R&D engineers write specifications and develop code that satisfies the requirements of our external customers.
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On a continuous basis R&D engineers deploy their mastery of physical verification applications, as well as physical implementation methodologies, to guide the accuracy, performance and functionality enhancements within the Cadence physical verification suite of products.
Job Qualifications:
Desired Skills and Experience (with different levels of experience):
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3+ years of experience in software development using C/C++, with a focus in working with complex algorithms and performance
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1+ years of experience using Linux
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Must be a fast learner and must demonstrate strong aptitude for out-of-the-box thinking and problem solving
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Algorithmic knowledge relating to graphs is a plus
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Experience in deck development for in physical verification is a plus
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Experience in physical signoff methodologies within the Physical implementation environment would be an added advantage.
Additional Skills/Preferences:
- Preferred skills include: experience with physical verification, schematic and layout design, SQL, Python.
Additional Information:
Cadence is committed to equal employment opportunity and employment equity throughout all levels of the organization. We strive to attract a qualified and diverse candidate pool and encourage diversity and inclusion in the workplace.
We’re doing work that matters. Help us solve what others can’t.
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关于Cadence

Cadence
PublicCadence Design Systems provides electronic design automation (EDA) software, hardware, and IP for designing and verifying electronic systems and semiconductors.
5,001-10,000
员工数
San Jose
总部位置
$8.5B
企业估值
评价
4.0
10条评价
工作生活平衡
4.2
薪酬
2.8
企业文化
4.1
职业发展
3.2
管理层
3.4
72%
推荐给朋友
优点
Good work-life balance
Supportive and collaborative team environment
Flexible work arrangements
缺点
Below market compensation
Limited career advancement opportunities
Heavy workload and long hours
薪资范围
58个数据点
Junior/L3
Junior/L3 · Data Analyst
1份报告
$91,103
年薪总额
基本工资
$85,276
股票
-
奖金
$5,827
$59,612
$139,984
面试经验
1次面试
难度
3.0
/ 5
时长
14-28周
面试流程
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Onsite/Virtual Interviews
5
Final Decision
常见问题
Technical Knowledge
Behavioral/STAR
Past Experience
Problem Solving
新闻动态
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Cadence Maps Its Future Beyond EDA With Agentic AI and Simulation - HPCwire
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3d ago
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