
Leading company in the technology industry
Sr Principal Application Engineer - Emulation
必备技能
Python
Ruby
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.システム・機能検証 担当アプリケーション・エンジニア
- 応募資格大卒 (電気・電子、コンピュータサイエンス)、またはそれに準じる経験、知識をお持ちの方で新しいことに意欲的にチャレンジ出来る方
- 経験/スキル6年以上のHDL設計・検証の業務経験を持つ方
- EDAツール(主に機能シュミレータ、デバッガ)の利用経 験がある方
- EDA ツール自体の評価などの経験がある方
- ハードウェアエミュレータやFPGAを使用した製品開発の経験がある方であればお尚よし
- 業務を効率良く行うためのプログラミング・スキルを持つ方(シェル、C/C++, Perl、Tcl、Python、Ruby等の活用経験)
- 検証言語(HDL/System Verilog/e/SystemC)や検証メソドロジ(UVM等)による検証環境構築もしくは機能検証の経験がある方
- 顧客が抱える検証課題に対して最適なソリューションを提供する事ができ、
顧客と良好な信頼関係を継続して構築できる方 - 日本語・英語でのメールのやり取り及び技術的会話に支障がない事
- 問題解決能力があり、モチベーションを高く持って自ら業務を進められる方
- 自らの活動範囲に制限を設けず、何事にも貪欲に取り組み、新しい技術を吸収しながら成長していける方
- 業務内容ケイデンスの機能検証製品に関する顧客向け技術プリセールス、及び、ポストサポート業務
Application Engineer – Functional Verification
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Qualification Requirements
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Bachelor’s degree in Computer Science, Electrical/Electronic Engineering, or related field
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Has the knowledge and desire to take on new challenges
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Experiences/Skills
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At least 6 years’ experience in HDL design and verification
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Experience in using EDA tools (mainly functional simulators and debuggers)
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Experience in evaluating EDA tools
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Experience of Mixed-Signal verification is better
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Experience in product development using Hardware Emulator or FPGA is better
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Programming skills to efficiently perform tasks (practical experience in shell scripting, C/C++, Perl, Tcl, Python, Ruby, etc.)
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Experience in construction of verification environments or functional verification using verification languages(HDL/System Verilog/e/SystemC) or verification methodologies (UVM, etc.)
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Can provide optimal solutions to the verification tasks that customers have and can continue to build good trust with customers
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Can communicate in both Japanese and English (email exchange and technical discussion)
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Ability to solve problems; can work independently with high motivation
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Does not put restrictions on scope of work, engages in everything with a passion, and can grow while absorbing new technologies
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Job Description
Technical pre-sales and post-sales services for customers of Cadence's functional verification products
We’re doing work that matters. Help us solve what others can’t.
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关于Cadence

Cadence
PublicCadence Design Systems, Inc. is an American multinational technology and computational software company headquartered in San Jose, California.
5,001-10,000
员工数
San Jose
总部位置
$8.5B
企业估值
评价
10条评价
3.9
10条评价
工作生活平衡
3.8
薪酬
2.7
企业文化
4.2
职业发展
3.2
管理层
2.8
72%
推荐率
优点
Flexible work arrangements and remote options
Great company culture and collaborative team
Good benefits and job security
缺点
Below average compensation and salary
High workload and overwhelming at times
Limited career advancement opportunities
薪资范围
75个数据点
Junior/L3
Junior/L3 · Data Analyst
1份报告
$91,103
年薪总额
基本工资
$85,276
股票
-
奖金
$5,827
$59,612
$139,984
面试评价
1条评价
难度
3.0
/ 5
时长
14-28周
面试流程
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Onsite/Virtual Interviews
5
Final Decision
常见问题
Technical Knowledge
Behavioral/STAR
Past Experience
Problem Solving
最新动态
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1w ago
Teen killed, older sister being taken off life support after crash - WSB-TV
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1w ago
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