招聘
福利待遇
•401(k)
•Equity
•Healthcare
必备技能
Technical learning ability
Customer communication
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Cadence Design Systems is looking for new STEM bachelor’s graduates with experience using electronic design automation (EDA) tools to join our Customer Support Team’s (CST) Rotational Program in San Jose, CA, Austin TX, Cary NC, Columbia MD, or Burlington MA.
As an integral member of CST, you work with the best in class EDA tools, collaborate with technical experts and support the sales team in a dynamic, innovative environment focused on silicon design and design automation. In this customer facing role you will provide the front-line design services, technical sales and customer support to the most advanced Cadence customers and will work with the Cadence account teams to come up with innovative solutions to address our customers’ most challenging technical problems. This is an entry level rotational position for STEM bachelor level graduates who have limited experience but a strong desire to learn and be a part of the electronic technologies of tomorrow.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
The person in this full time regular entry level position will start in a cohort based, one year program that will include new colleges graduates from across North America and consist of two six month rotations with detailed, hands-on training in applications used for Digital Design/Simulation, Physical Design, Analog Layout, Advanced Verification or Hardware Emulation. This program is only for students graduating with a Bachelor’s degree only. The opportunity to learn from the technical experts, sales and application engineers who provide the design services, technical sales and customer support to the most advanced Cadence customers will be included in this one year program.
After the cohort program has been successfully completed, the person in this role will be assigned full time regular responsibilities in a CST business group based on the person’s interests and company needs.
This cohort-based program will offer experience in the following areas:
- Fundamentals in design, verification, HDLs, synthesis and timing
- Embedded software development and HW/SW codesign and co-verification
- UNIX , C/C, and scripting languages such as Perl, TCL, Python
- Digital physical design and implementation
- Sign-off for timing, IR drop, power analysis, SI analysis
- Custom and analog design
- Opportunity to network and participate in fun activities and recent college grad community at Cadence.
Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn silicon and electronic design concepts into reality.
Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
The annual salary range for California is $74,200 to $137,800. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
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关于Cadence

Cadence
PublicCadence Design Systems provides electronic design automation (EDA) software, hardware, and IP for designing and verifying electronic systems and semiconductors.
5,001-10,000
员工数
San Jose
总部位置
$8.5B
企业估值
评价
4.0
10条评价
工作生活平衡
4.2
薪酬
2.8
企业文化
4.1
职业发展
3.2
管理层
3.4
72%
推荐给朋友
优点
Good work-life balance
Supportive and collaborative team environment
Flexible work arrangements
缺点
Below market compensation
Limited career advancement opportunities
Heavy workload and long hours
薪资范围
58个数据点
Junior/L3
Junior/L3 · Data Analyst
1份报告
$91,103
年薪总额
基本工资
$85,276
股票
-
奖金
$5,827
$59,612
$139,984
面试经验
1次面试
难度
3.0
/ 5
时长
14-28周
面试流程
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Onsite/Virtual Interviews
5
Final Decision
常见问题
Technical Knowledge
Behavioral/STAR
Past Experience
Problem Solving
新闻动态
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