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Job Description
This position provides an outstanding opportunity for a highly motivated and experienced verification engineer to join the engaging, hardworking, and creative System IP team.
The latest and most advanced hardware design and verification methodologies are employed to build the System IPs that will drive the development of the next generation of compute solutions for every area of technology, from mobile phones, to servers, to autonomous vehicles.
About the team
The Arm Central Engineering – System IP group in Cambridge is responsible for specifying, developing and validating IP products from the Arm CoreLink and CoreSight IP portfolio, responsible for interrupt control, inter-process communication, trace, and debug solutions. These IPs are a crucial part of systems that scale from real-time embedded to hyperscale cloud. We are looking for verification experts to join our team and play an integral role in developing technology that makes people's lives better.
This role will be based at Arm’s corporate headquarters in the historic city of Cambridge, home to one of the world’s most renowned and oldest Universities. The city is a key driver of global innovation, and regularly features as one of the most desirable places to live in the UK. As Arm’s largest engineering centre, the Cambridge site is fortunate enough to be involved in development across all areas of Arm’s ever-growing product portfolio. As a Cambridge-based Arm employee, you will be surrounded by world-leading experts and will have the opportunity to work with some of the very best engineers in the industry. If the challenge of working on our cutting-edge technology excites you, and you can meet the requirements of the job description below, we look forward to receiving your application!
What will you be accountable for?
For this role we are looking for engineers who are capable of owning the verification of a unit within a project through all phases of the design and verification flow. This includes:
- Working closely with the RTL design team to develop comprehensive verification strategies
- Creating and reviewing design verification documentation
- Designing and implementing SystemVerilog/UVM based verification IP and testbenches
- Improving existing testbenches to increase performance, quality and efficiency
- Testing and debugging Verilog RTL
- Defining and implementing functional coverage as well as enhancing the testbench to ensure coverage closure
- Planning and tracking tasks to meet the targets at the planned time
- Driving the execution to ensure the quality of the design work done, along with on-time delivery
- Coaching and mentoring junior engineers
Required Skills and Experience
- Substantial experience in RTL verification of complex ASIC products
- Proficiency in a hardware verification language, preferably System Verilog / UVM
- Experience in the development of coverage-driven constrained random test environments
- Experience producing specifications and documentation describing complex designs
- Understanding of the fundamentals of computer architecture
- Strong communication skills and ability to work well as part of a team
'Nice to have' Skills and Experience
- Scripting languages such as Python or Perl
- Exposure to all stages of the design cycle: initial concept, specification, implementation and testing, documentation and support
- Understanding of object-oriented programming, data structures, and algorithms
- Knowledge of formal verification techniques and tools
- Hardware design language, preferably Verilog
Our 10x mindset guides how we engineer, collaborate, and grow. Understand what it means and how to reflect 10x in your work: https://careers.arm.com/en/10x-mindset
Accommodations at Arm
At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email accommodations@arm.com. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process.
Hybrid Working at Arm
Arm’s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team’s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you.
Equal Opportunities at Arm
Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.
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スクラップ
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ARMについて

ARM
PublicArm Holdings plc is a British semiconductor and software design company based in Cambridge, England, whose primary business is the design of central processing unit (CPU) cores that implement the ARM architecture family of instruction sets.
5,001-10,000
従業員数
Cambridge
本社所在地
$54.5B
企業価値
レビュー
4.1
10件のレビュー
ワークライフバランス
4.0
報酬
3.2
企業文化
4.3
キャリア
3.0
経営陣
3.5
75%
友人に勧める
良い点
Flexible work arrangements and schedules
Supportive and collaborative colleagues
Good work environment and culture
改善点
Limited career advancement and slow promotions
Below average compensation and salaries
High workload and expectations
給与レンジ
1,460件のデータ
L2
L3
L4
L5
L6
L2 · Financial Analyst L2
0件のレポート
$50,779
年収総額
基本給
$20,312
ストック
$25,390
ボーナス
$5,078
$35,545
$66,013
面接体験
2件の面接
難易度
3.0
/ 5
期間
14-28週間
面接プロセス
1
Application Review
2
HireVue Assessment
3
Technical Phone Screen
4
Onsite/Virtual Interviews
5
Team Matching
6
Offer
よくある質問
Technical Knowledge
Coding/Algorithm
Behavioral/STAR
Past Experience
ニュース&話題
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