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Do you love creating elegant solutions to highly complex challenges? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC)! You'll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you'll be responsible for crafting and building the technology that fuels Apple's devices. Together, you and your team will enable our customers to do all the things they love with their devices! In this highly visible role, you will be at the heart of the chip design effort collaborating with a variety of fields with critical impact in getting products to millions of customers quickly. The Graphics Verification Engineer will be responsible for the pre-silicon RTL verification of blocks in low power embedded graphics cores. This includes deep understanding of the micro-architectural details of their block and how it works within the broader GPU design. A strong computer architecture background, preferably in graphics, and a solid foundation in verification methodology will be required to close testing coverage with high confidence.

Description:

Perform top-level verification for logic blocks in graphics processing unit (GPU) designs.

Write, execute, and track to test plans.

Develop test bench components in System Verilog and Universal Verification Methodology (UVM) including checkers and monitors.

Develop top-level tests to validate chip level features.

Enable and maintain handle regressions.

Write and maintain test benches and BFMs.

Generate stimulus and implement/analyze coverage.

Debug simulation and silicon GPU failures.

Work closely with design & micro-architecture teams to understand the functional goals of the design.

Collaborate with multi-functional teams to coordinate verification efforts across DV scopes.

Develop scripts for software engineering flows.

Preferred Qualifications:

Experience working with GPU architectures.

Understanding of constrained random verification process, functional/code coverage, and assertion methodology.

Ability to manage multiple priorities under strict schedule deadlines.

Experience in developing test bench components in UVM including checkers and monitors.

Familiarity with Perl, Shell scripting, Makefiles, TCL.

Prior exposure to code repositories like Perforce.

Ability to work well on a team with experience in collaborating with other teams.

Minimum Qualifications:

BS + 3 years of relevant experience.

Background in CPU or GPU architectures.

Experience working with Verilog or other HDLs.

Experience with verification language such as System Verilog/UVM/OVM.

Experience working with various HDL simulators and waveform viewers like IES, VCS, DVE, Verdi.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant .