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Description:

APPLE INC has the following available in Austin, Texas. Review architecture and Design specifications. Extract design features and develop attributes and verification plans. Work with designers to verify DFT implementation and run various checks. Implement test benches, generating advised/constrained random tests. Debug failures, run RTL and gate level simulations, supervise bugs, and closing coverage. Handle schedules and support multi-functional engineering effort. Assist in verification flows, automation scripts and regressions. Work with cross functional teams to bring up test patterns and deliverables on silicon. 40 hours/week.

Preferred Qualifications:

N/A

Minimum Qualifications:

Master's degree or foreign equivalent in Electrical Engineering or related field.

Experience and/or education must include:

Utilizing VLSI Design and VLSI Architecture knowledge to understand complex ASIC designs.

Using Verilog skills to debug and verify designs.

Utilizing Perl/Python or Tcl scripting to aid in automating scripts and internal tools.

Knowledge of CMOS devices and circuits.

Digital Logic Gate Analysis and Design.

Using Test Automation and Test Methodology for implementing large scale DV regressions.

Utilizing Timing Analysis to debug complex timing bugs.

Using Synthesis and Simulation to debug RTL and netlist issues.

Utilizing DFT knowledge for generating ATE patterns and ATE debug.

Using Memory Circuits knowledge for verifying memory operation behavior.

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