Are you passionate about advancing the boundaries of RF analog circuit integration in advanced technology nodes for wireless transceivers? Do you thrive on innovation and improving RF layout methodologies? As an RFIC Layout Engineer, you will address intriguing daily layout challenges, collaborate with skilled RFIC design and layout teams, and continuously improve products to surpass previous iterations and enrich user experiences worldwide.

Description:

You will lay out detailed custom blocks, including floorplanning, placement, routing, and verification for high-frequency RF circuits, verifying and refining layouts through simulation to meet design requirements. You will diagnose sophisticated verification (DRC/LVS) and PDK issues using Cadence and Calibre. Collaboration with engineering design and layout teams will be meaningful to understand design concepts, constraints, and opportunities for improvement. Upon identifying challenges, you will propose solutions to streamline layout tasks, collaborating with teams to specify and finalize methodologies.","responsibilities":"Perform floorplanning, placement, routing, and verification for custom RF circuit blocks.

Verify and refine layouts through simulation to meet design requirements.

Diagnose sophisticated verification (DRC/LVS) and PDK issues using Cadence and Calibre.

Identify challenges and propose solutions to streamline layout tasks.

Collaborate with teams to specify and finalize layout methodologies.

Preferred Qualifications:

Experience in sophisticated DRC, ERC, LVS verification, and debugging.

Prior experience in crafting custom layouts at the chip, block, and device levels, particularly for RF high-frequency circuits such as LNAs, mixers, VCOs, and PLLs is a plus.

RF experience is helpful

Minimum Qualifications:

BS with 3+ years of industry experience.

Deep knowledge of sub-micron CMOS technologies (16nm, 7nm, and beyond) and proficiency with FinFET structures, guard-rings, deep N-wells, and PN junctions are required.

Familiarity with sophisticated process effects such as LOD, WPE, and DFM is critical.

Understanding trade-offs involving matching, parasitic effects, high-frequency routing, isolation, coupling, shielding, RC delay, EM, IR, ESD, and latch-up is vital.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant .

Pay & Benefits:

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $134,800 and $245,800, and your base pay will depend on your skills, qualifications, experience, and location.

Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits.

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.