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Description:

APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Responsible for all aspects of timing including: timing methodology, timing analysis, convergence and closure and final signoff. Apply knowledge of detailed path analysis and understanding of chip floor planning and time budgeting. Responsible for process variation, various timing margins, derates and detailed tool settings. Work with both Front End and Physical Design engineers for timing changes related to constraint debug and updates as well as detailed specifications and validation of design changes. Execute timing runs while maintaining and innovating scripts and infrastructure. Provide documentation for guidelines and specs. Apply signoff ownership to ensure first silicon success. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $153,010 - $220,900/yr and your base pay will depend on your skills, qualifications, experience, and location.

PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html.

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Preferred Qualifications:

N/A

Minimum Qualifications:

Master's degree or foreign equivalent in Electrical Engineering, Electronic Engineering, Mixed Signal Design, or related field and 1 year of experience in the job offered or related occupation.

Education or experience with each of the following skills is required:

Understanding of static timing analysis concepts, including setup/hold timing checks, triaging and identifying design rule violations, and providing fix guidance.

Using Perl/Python and TCL to improve productivity and automation.

Experience triaging noise violations, providing fix guidance and reviewing tool issued warnings and errors.

Understanding design architecture and SDC constraints to provide feedback to design teams.

Experience in Floor planning and routing concepts.

Working with Device Physics to help meet challenging Power, Performance and Area considerations.

Experience using static timing analysis tools and timing verification for designs

Understanding of RTL2GDS workflow and place and route tools

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant .