Apple's Silicon Security team is looking for a driven ASIC Design Engineer to build the secure subsystems that protect the entire Apple SoC. In this role, you will design the state-of-the-art hardware defenses that prevent complex side channel attacks and ensure the integrity of our customers' most sensitive data across Apple's product line. Our work spans cryptographic engines, side channel attack monitors, data protection logics etc that make Apple devices the most secure consumer electronics in the world.

Description:

As an ASIC Design Engineer on the Silicon Security team, you will be responsible for the micro-architecture, RTL design and integration of secure subsystems. Your responsibilities will include:

• Architecting and designing state-of-the-art security features, working closely with Platform Architecture, Design Verification to deliver high performance, area and power efficient RTL Blocks on time

• Integrating security IPs into secure subsystem and ensuring timing, performance and security requirements are met.

• Resolving integration issues across multiple IP blocks and coordinating with IP owners on interface and functionality concerns

• Driving front-end quality flows from RTL to netlist, including hands-on work with Lint, CDC/RDC analysis, UPF development, timing, and Synthesis.

• Leveraging AI-assisted tools to enhance design quality and productivity.

Preferred Qualifications:

Experience with CDC (Clock Domain Crossing) and RDC (Reset Domain Crossing) analysis and verification.

Familiarity with low-power design techniques and UPF (Unified Power Format).

Solid understanding of digital design fundamentals including synthesis, timing closure, and design for testability.

Background in cryptography and cryptographic algorithm implementation.

Experience with hardware security concepts including key management, physical attack and countermeasures.

Experience with clock and reset architecture at the subsystem level

Strong knowledge of AMBA bus protocols (AXI, AHB, APB).

Experience with hardware security concepts including key management, physical attack and countermeasures

Minimum Qualifications:

BS in Electrical Engineering, Computer Engineering or a relevant field and 3 years of industry experience

3 years of RTL design experience using Verilog or System Verilog.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant .

Pay & Benefits:

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $147,400 and $272,100, and your base pay will depend on your skills, qualifications, experience, and location.

Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits.

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.