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WHAT YOU DO AT AMD CHANGES EVERYTHING
At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.
THE ROLE:
The Technical Lead is responsible for the test solution for a next-generation AMD Products. This position serves as the Test Engineering team's Technical Leader and go-to expert for solutions. This position requires engagement with Product, Design, Platform Engineering, Device Analysis, Foundry, Quality and Reliability Engineering to drive test and characterization plan, 1st silicon bring-up, silicon debug, attainment and optimization of yield and performance distributions, test costs and product quality for next-generation AMD products.
This role offers opportunities for experienced Engineers who are interested in growing their technical scope over time, based on individual performance and business needs.
THE PERSON:
We are looking for one with a passion for technical development, possessing broad technical leadership, critical problem solving and troubleshooting skills. The person must be a team player and have good and effective communications to deep dive into technical discussion with other members across the globe and use data to illustrate their points. This person is expected to be independent, self-starter, well organized and have the sense of responsibility to see projects through beginning to the end as well as the ability to lead by influence. This person is expected to be market savvy and comfortable in a multi-tasking environment.
KEY RESPONSIBILITIES:
-
**New Product Introduction (NPI)**Define and drive pre silicon test and characterization strategies for complex SoC products.
-
Establish DFT and pattern requirements, and work with Design and Verification teams to ensure test readiness prior to first silicon.
-
Lead first silicon bring up, silicon debug, and characterization execution across PVT corners.
-
Analyze yield, performance distributions, and device failures; lead root cause analysis and drive corrective actions across global teams.
-
Perform circuit sensitivity analysis, interpret findings, and guide deep dive investigations to resolution.
-
Drive innovation in SoC test, debug, DFT, and test methodology, translating ideas into production ready solutions.
-
Production & Cost Optimization
-
Own test content optimization to meet product quality and cost targets.
-
Drive yield, test time, and margin improvements from wafer sort through backend test.
-
Partner with manufacturing and quality teams to ensure stable, scalable production.
PREFERRED EXPERIENCE:
- Technical
Strong hands-on experience supporting complex SoC products (e.g., mobile or automotive processing units).
-
Proven technical leadership across at least one full SoC product lifecycle (pre silicon to production).
-
Deep expertise in DFT and ATE test methodologies, spanning areas like ATPG Scan, MBIST, Functional, and High‑Speed IO testing across complex SoC environments.
-
Strong experience with Advantest 93k/Teradyne test platforms.
-
Solid understanding of CPU / GPU / SoC architectures with system level interactions as a plus.
-
Strong programming or scripting skills (Python, C/C++, Perl, Java).
-
Experience with industry EDA tools (Mentor, Synopsys, Cadence) is a plus.
-
Leadership
-
Demonstrated ability to act as a technical decision‑maker and mentor within the test organization.
-
Strong communication skills to engage deeply with global, cross‑functional engineering teams.
-
Willingness and capability to take on broader ownership, including mentoring engineers and contributing to long‑term test strategy and team development.
-
Strong ability to lead by influence
-
Ability to program manage and drive test schedules and deliverables
ACADEMIC CREDENTIALS:
- Bachelor/Master in Electrical/Electronic Engineering
LOCATION:
Singapore
*Benefits offered are described: *AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
THE ROLE:
The Technical Lead is responsible for the test solution for a next-generation AMD Products. This position serves as the Test Engineering team's Technical Leader and go-to expert for solutions. This position requires engagement with Product, Design, Platform Engineering, Device Analysis, Foundry, Quality and Reliability Engineering to drive test and characterization plan, 1st silicon bring-up, silicon debug, attainment and optimization of yield and performance distributions, test costs and product quality for next-generation AMD products.
This role offers opportunities for experienced Engineers who are interested in growing their technical scope over time, based on individual performance and business needs.
THE PERSON:
We are looking for one with a passion for technical development, possessing broad technical leadership, critical problem solving and troubleshooting skills. The person must be a team player and have good and effective communications to deep dive into technical discussion with other members across the globe and use data to illustrate their points. This person is expected to be independent, self-starter, well organized and have the sense of responsibility to see projects through beginning to the end as well as the ability to lead by influence. This person is expected to be market savvy and comfortable in a multi-tasking environment.
KEY RESPONSIBILITIES:
-
**New Product Introduction (NPI)**Define and drive pre silicon test and characterization strategies for complex SoC products.
-
Establish DFT and pattern requirements, and work with Design and Verification teams to ensure test readiness prior to first silicon.
-
Lead first silicon bring up, silicon debug, and characterization execution across PVT corners.
-
Analyze yield, performance distributions, and device failures; lead root cause analysis and drive corrective actions across global teams.
-
Perform circuit sensitivity analysis, interpret findings, and guide deep dive investigations to resolution.
-
Drive innovation in SoC test, debug, DFT, and test methodology, translating ideas into production ready solutions.
-
Production & Cost Optimization
-
Own test content optimization to meet product quality and cost targets.
-
Drive yield, test time, and margin improvements from wafer sort through backend test.
-
Partner with manufacturing and quality teams to ensure stable, scalable production.
PREFERRED EXPERIENCE:
- Technical
Strong hands-on experience supporting complex SoC products (e.g., mobile or automotive processing units).
-
Proven technical leadership across at least one full SoC product lifecycle (pre silicon to production).
-
Deep expertise in DFT and ATE test methodologies, spanning areas like ATPG Scan, MBIST, Functional, and High‑Speed IO testing across complex SoC environments.
-
Strong experience with Advantest 93k/Teradyne test platforms.
-
Solid understanding of CPU / GPU / SoC architectures with system level interactions as a plus.
-
Strong programming or scripting skills (Python, C/C++, Perl, Java).
-
Experience with industry EDA tools (Mentor, Synopsys, Cadence) is a plus.
-
Leadership
-
Demonstrated ability to act as a technical decision‑maker and mentor within the test organization.
-
Strong communication skills to engage deeply with global, cross‑functional engineering teams.
-
Willingness and capability to take on broader ownership, including mentoring engineers and contributing to long‑term test strategy and team development.
-
Strong ability to lead by influence
-
Ability to program manage and drive test schedules and deliverables
ACADEMIC CREDENTIALS:
- Bachelor/Master in Electrical/Electronic Engineering
LOCATION:
Singapore
*Benefits offered are described: *AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
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AMDについて

AMD
PublicAdvanced Micro Devices, Inc. (AMD) is an American multinational semiconductor company headquartered in Santa Clara, California.
10,001+
従業員数
Santa Clara
本社所在地
$240B
企業価値
レビュー
3.7
10件のレビュー
ワークライフバランス
2.8
報酬
3.2
企業文化
4.1
キャリア
3.4
経営陣
3.8
68%
友人に勧める
良い点
Great team culture and spirit
Innovative projects and cutting-edge technology
Supportive management and leadership
改善点
High workload and overwhelming work demands
Work-life balance challenges
High pressure and stressful deadlines
給与レンジ
6件のデータ
L2
L3
L4
L5
L6
L2 · Data Analyst L2
0件のレポート
$76,430
年収総額
基本給
$30,572
ストック
$38,215
ボーナス
$7,643
$53,501
$99,359
面接体験
2件の面接
難易度
3.0
/ 5
期間
14-28週間
内定率
50%
面接プロセス
1
Application Review
2
Recruiter Screen
3
Hiring Manager Interview
4
Technical Interview
5
Offer
よくある質問
Technical Knowledge
Behavioral/STAR
Past Experience
Problem Solving
ニュース&話題
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4d ago