WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.THE ROLE:

As a Silicon Design Engineer, you will work with formal experts and designers to verify formal properties and drive convergence.

THE PERSON:

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

Main Responsibilities:

• Participate in performance model/RTL design correlation for next-generation memory technologies, scalable interconnects, and quality-of-service features.
• Conduct performance analysis and validate metrics against hardware implementations to ensure accurate modeling.
• Collaborate with architects and design teams to align performance models with the overall system architecture.
• Contribute to performance model/RTL correlation efforts to achieve high accuracy.
• Understand and contribute to SoC interconnect and memory controller architecture.
• Use micro-benchmarks and workloads to identify performance gaps between RTL and model.

Required Skills:

• Strong verification experience (System Verilog, UVM)
• Proficiency in C++, object-oriented programming, and Python
• Skills in QoS, test creation, analysis, and coverage

Nice to Have:

• Exposure to x86 architecture and performance optimization
• Knowledge of digital design and verification processes
• Familiarity with scripting and automation tools to enhance modeling workflows
• Experience with scalable interconnects and memory technologies
• Understanding of quality-of-service (QoS) concepts in system design

ACADEMIC CREDENTIALS:

• Bachelors or Masters degree in computer engineering/Electrical Engineering

#Hybrid

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

THE ROLE:

As a Silicon Design Engineer, you will work with formal experts and designers to verify formal properties and drive convergence.

THE PERSON:

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

Main Responsibilities:

• Participate in performance model/RTL design correlation for next-generation memory technologies, scalable interconnects, and quality-of-service features.
• Conduct performance analysis and validate metrics against hardware implementations to ensure accurate modeling.
• Collaborate with architects and design teams to align performance models with the overall system architecture.
• Contribute to performance model/RTL correlation efforts to achieve high accuracy.
• Understand and contribute to SoC interconnect and memory controller architecture.
• Use micro-benchmarks and workloads to identify performance gaps between RTL and model.

Required Skills:

• Strong verification experience (System Verilog, UVM)
• Proficiency in C++, object-oriented programming, and Python
• Skills in QoS, test creation, analysis, and coverage

Nice to Have:

• Exposure to x86 architecture and performance optimization
• Knowledge of digital design and verification processes
• Familiarity with scripting and automation tools to enhance modeling workflows
• Experience with scalable interconnects and memory technologies
• Understanding of quality-of-service (QoS) concepts in system design

ACADEMIC CREDENTIALS:

• Bachelors or Masters degree in computer engineering/Electrical Engineering

#Hybrid

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.