WHAT YOU DO AT AMD CHANGES EVERYTHING:

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.  Together, we advance your career.THE ROLE:
As a Silicon Photonics Reliability Engineer in the Optical IO team, you will collaborate with various Product Development, Silicon Design and Packaging Groups and interface with key technology partners.  This individual serves as a critical technical point of contact to ensure best-practices, standards and emerging reliability approaches and methodologies are architected, developed, and driven throughout the organization.  This position focuses on establishing industry leading reliability solutions for advanced silicon photonics products.  You will be part of a larger team that defines reliability solutions from concept, design, development, qualification and test through production deployment.

THE PERSON: This is a technical leadership position that requires engineering experience in semiconductor reliability with a focus on silicon photonics.  The ideal candidate should have a proven ability to tackle complex reliability challenges for various silicon photonics & optical interconnect technologies.  This role requires excellent communication and coordination across various teams and capable of defining long-term reliability solutions.

KEY RESPONSIBILITIES:

• Collaborate with silicon design, product & test, and packaging teams to architect & define reliability solutions for silicon photonics at wafer-level and CPO-level
• Collaborate with design, packaging, and key suppliers to understand structural and parametric mechanisms for reliability and quality issues
• Interface with suppliers to provide technical inputs & reliability requirements to enable production-worthy end-to-end solutions
• Deep knowledge to train other teams & engineers in the field of silicon photonics across design, packaging and volume test
• Responsible for identifying & mitigating reliability challenges and executing large technical projects and processes in a timely manner
• Expertise with fundamental reliability physics of leading silicon photonics foundry process technologies and advanced packaging technologies
• Expertise with end-to-end reliability and failure analysis, implementing POF models, stress testing methodologies (JEDEC/standards based, thermal/humidity cycling, electromigration, electrical overstress, etc), and root-cause analyses using advanced analysis techniques (FIB, SEM/TEM, EDX, etc)
• Develop and implement corrective actions to prevent recurrence of failures
• Collaborate with design, packaging and process engineering teams to identify root causes and implement effective changes
• Employ statistical analysis and problem-solving techniques to identify root causes of failures
• Analyze failure data to identify trends and patterns
• Generate comprehensive failure analysis reports and presentations
• Communicate complex technical information to a wide range of audiences
• Deep knowledge of key theoretical approaches, modeling and analytical techniques to assess and project failure distributions, early failures, wearout failures, lifetime projections and FIT rates
• Deep knowledge of accelerated stress approaches such as HTOL, HAST, ESD/LU and others
• Experience with stress hardware such as controlled temperature chambers, liquid heat exchanger apparatus, air flow apparatus, wafer chucks and other approaches
• Familiarity with test equipment station SPC/EOM and control charts
• Experience with stress experiment design including readpoint intervals and readpoint analysis
• Specify and develop critical infrastructure and develop vendor relationships to evaluate critical reliability metrics and set the standard for laboratory evaluation and FA
• Devise and quantify critical FMEA framework for silicon photonics technologies and advanced packaging technologies
• Create roadmaps to evolve and continuously improve reliability experiments, data analysis approaches and FA techniques
• Collaborate cross-functionally with R&D, silicon photonics, optics, and SoC teams to align on product roadmaps, perform risk assessments and drive continuous improvements in yield, cost, and scalability for AI hardware
• Collaborate with qualification engineering teams to design effective stress metrics and experiments
• Specify and develop test fixtures in collaboration with Hardware, PCB, and Firmware engineers
• Develop data analysis and test automation software in collaboration with design engineers

PREFERRED EXPERIENCE:

• Proven experience in the field of optical interconnects and silicon photonics
• Familiar with general test & manufacturing of silicon photonics including burn-in and temperature testing in HVM
• Good communication skills and ability to work with geographically distributed engineering teams
• Recommend and develop DOE structures for silicon photonics tapeouts to quantify critical reliability parameters
• Evaluate and apply reliability guidelines from silicon photonics foundries to optimize functional and reliability performance
• Establish DFR methodologies and collaborate with CAD and design teams to utilize and evolve advanced reliability simulation techniques
• Experience with fault isolation techniques via bench, wafer prober and ATE platforms
• Software development for data analysis and test automation such as JMP, Minitab, PyVISA, MATLAB and other tools
• Hands-on experience with laser module reliability and qualification
• Experience with reliability of advanced CMOS and other high performance semiconductor process technologies
• Experience with high-reliability telecom product development and manufacturing
• Knowledge of ISO-9000 and TL-9000 QMS systems
• Experience with GR-468 and other qualification standards and frameworks
• Familiarity with wireline and optical communication systems with concepts such as optical-signal-to-noise ratio, receiver sensitivity, optical modulation amplitude, and optical filtering
• Hands-on experience with high-speed test equipment such as bit error rate testers, digital communication analyzers, real-time oscilloscopes, vector network analyzers, and arbitrary waveform generators
• Hands-on experience with optical test equipment, including swept laser sources, power meters, optical spectrum analyzers, optical time domain reflectometers, optical amplifiers, and best practices in optical test systems
• Hands-on experience with advanced electrooptic wafer and die-level test systems
• Experience leading reliability and qualification engineers and technician personnel
• Strong industrial experience with reliability of leading edge EIC/PIC products in high-volume production

ACADEMIC CREDENTIALS:

• MS or PhD in Electrical, Computer Engineering, Optics & Photonics Engineering, or comparable disciplines

LOCATION: San Jose, CA

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.