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•Competitive salary and equity package
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Infrastructure Architect / Micro Architect
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- JOB_DESCRIPTION.SHARE.HTML
- San Jose, California
- Engineering
- 74464
- USD $191,040.00/Yr.
- USD $286,560.00/Yr.
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Job Description
WHAT YOU DO AT AMD CHANGES EVERYTHING:
At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.
THE ROLE:
We are seeking a SoC Micro Architect to define and drive architecture for Adaptive SoC and FPGA platforms. This role focuses on hardware and software for configuration and control functions. You will work on Firmware and Hardware, develop SW-readable specifications, and create software models to enable seamless configuration and control across Adaptive So Cs.
THE PERSON
You are passionate about complex Adaptive SoC architecture and thrive in environments that require cross-domain expertise. You have deep technical knowledge in RTL , Firmware, and system-level modeling, combined with strong analytical skills. You excel at collaborating across hardware and software teams and can influence architecture decisions for next-generation adaptive silicon.
KEY RESPONSIBILITIES:
- Define and develop Architecture for configuration and control functions across Adaptive So
C and FPGA platforms:
- Create SW-readable specifications for configuration/control features and ensure alignment with firmware and RTL implementation
- Develop and maintain software models for system-level simulation and validation
- Collaborate with hardware, firmware, and software teams to ensure cohesive integration
- Drive performance, power, and area (PPA) optimization for configuration/control paths
- Analyze trade-offs for scalability, reliability, and manufacturability across roadmap devices
- Provide architectural guidance for boot/reset flows, power management, and system-level QoS
- Influence strategies for security, safety, and lifecycle management in configuration/control domains
PREFERRED EXPERIENCE:
-
Strong background in SoC architecture including Processor Subsystems, FPGA, and AI/ML integration
-
Hands-on experience with firmware development, RTL design, and hardware/software co-design
-
RTL design experience specifically System Verilog
-
Expertise in creating SW-readable specifications and system-level models
-
Familiarity with AXI or similar on-chip protocols, low-power design techniques, and boot/reset flows
-
Proficiency in modeling and automation using Python, System-C, or similar languages
-
Firmware development for integration of embedded processor, C++ proficiency
-
Knowledge of design methodologies, advanced process technologies, and associated challenges
-
Proven track record in delivering architecture for adaptive So Cs, or similar complex platforms
-
ACADEMIC & EXPERIENCE REQUIREMENTS
-
BS/MS/Ph
D in Electrical or Computer Engineering:
LOCATION: San Jose, CA
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
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About AMD

AMD
PublicA semiconductor company that designs and develops graphics units, processors, and media solutions
10,001+
Employees
Santa Clara
Headquarters
Reviews
3.5
25 reviews
Work Life Balance
3.2
Compensation
4.1
Culture
3.6
Career
3.4
Management
3.1
65%
Recommend to a Friend
Pros
Good compensation and benefits
Positive work environment
Great management and coworkers
Cons
Poor work life balance
Micromanagement and excessive tracking
Too much pressure and workload
Salary Ranges
6 data points
L2
L3
L4
L5
L6
L2 · Data Analyst L2
0 reports
$76,430
total / year
Base
$30,572
Stock
$38,215
Bonus
$7,643
$53,501
$99,359
Interview Experience
5 interviews
Difficulty
3.6
/ 5
Duration
14-28 weeks
Offer Rate
60%
Experience
Positive 20%
Neutral 20%
Negative 60%
Interview Process
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Technical Interview
5
Hiring Manager Interview
6
Offer
Common Questions
Coding/Algorithm
Technical Knowledge
Behavioral/STAR
Past Experience
System Design
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