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Formal Verification Staff Engineer

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• JOB_DESCRIPTION.SHARE.HTML
• Santa Clara, California
• Engineering
• 72097
• USD $159,840.00/Yr.
• USD $239,760.00/Yr.

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Job Description

WHAT YOU DO AT AMD CHANGES EVERYTHING:

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

THE ROLE:

We are looking for an adaptive, self-motivated formal verification engineer to join our growing team. As a key contributor, you will be part of a highly collaborative team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market. Specifically, the Formal Verification Team is an integral part of AMD’s Cores Development Team, responsible for the development of the next generation processor cores. This team embraces innovation to improve time to market while beating performance, power and quality expectations.

THE PERSON:

You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES:

Apply Advanced Formal Verification Techniques to AMDs cutting edge design for achieving Full Proofs.

Maintain the best-in-class formal verification infrastructure to improve formal verification productivity.

Develop technical relationship with broader AMD Design community and peers.

Drive cross-department innovation and collaboration inside AMD.

Be part of the R&D group for emerging formal verification domains like security, safety, low power, architecture level formal verification, etc.

PREFERRED EXPERIENCE:

ASIC design, verification, or related work experience in Formal Verification.

Verification skills: Formal verification, Assertion based verification, FPV and/or DPV.

Complexity Analysis, Design Abstraction & Formal Coverage.

Design debug, Deep bug hunting.

Formal test planning, Formal tools – Jasper and/or VC-formal.

System Verilog, Verilog or VHDL, Scripting (TCL/Python) skills required.

Design knowledge either or all domains of CPU, GPU, Bus/Noc/Interconnect, Memory Controllers, Cache preferred.

ACADEMIC CREDENTIALS:

BS in Computer Engineering, Computer Science, Electrical Engineering or other related fields with extensive work experience, and/or MS / PhD with some work experience.

LOCATION:

Santa Clara, CA

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.
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