トレンド企業

AMD
AMD

Together we advance.

RTL/IP Design Lead

職種デザイン
経験シニア級
勤務地Bengaluru, India
勤務オンサイト
雇用正社員
掲載3ヶ月前

報酬

CA$148,720 - CA$223,080

応募する

福利厚生

育児休暇

必須スキル

InVision

Framer

Adobe Creative Suite

Back

RTL/IP Design Lead

JOB_DESCRIPTION.SHARE.HTML
CAROUSEL_PARAGRAPH

  • JOB_DESCRIPTION.SHARE.HTML
  • Bangalore, India
  • Engineering
  • 74305

mail_outline
Get future jobs matching this search
Loginor Register

Job Description

WHAT YOU DO AT AMD CHANGES EVERYTHING:

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

SMTS SILICON DESIGN ENGINEER:

THE ROLE:

As a member of the Data Fabric Team , you will help bring to life cutting-edge designs. Your role will be to micro-architect , design and deliver data fabric IP RTL components , while managing the requirements of power, performance and area , to meet next-gen fabric requirements. You will work closely with the architecture, Verification and Physical Design teams to achieve first pass silicon success.

THE PERSON:

A successful candidate will work with senior architects and design engineers. The candidate will be highly detail-oriented, possessing good communication and problem-solving skills.

KEY RESPONSIBLITIES:

  • Define Data Fabric features and capabilities required to meet SoC requirements on power, performance, Area targets

  • Digital design implementation and micro-architecture of components of the Infinity Data Fabric, including cache design .

  • Micro-architecture and RTL coding in Verilog/System Verilog .

  • Lead design on one or more domains

  • Work with architects and design leads to identify and assess complex technical issues

  • Work closely with verification teams to ensure quality component development

  • Work closely with Physical design to ensure quality PPA targets

  • Post silicon support to ensure successful bring up

PREFERRED EXPERIENCE:

  • Excellent foundation in fabric /transport architecture and coherency
  • Experience in memory design/cache design

ACADEMIC CREDENTIALS:

  • Bachelors or Masters degree in computer engineering/Electrical Engineering

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.
Apply JOB_DESCRIPTION.SHARE.HTML
CAROUSEL_PARAGRAPH
JOB_DESCRIPTION.SHARE.HTML

閲覧数

0

応募クリック

0

Mock Apply

0

スクラップ

0

AMDについて

AMD

AMD

Public

Advanced Micro Devices, Inc. (AMD) is an American multinational semiconductor company headquartered in Santa Clara, California.

10,001+

従業員数

Santa Clara

本社所在地

$240B

企業価値

レビュー

10件のレビュー

3.7

10件のレビュー

ワークライフバランス

2.8

報酬

3.2

企業文化

4.1

キャリア

3.4

経営陣

3.8

68%

知人への推奨率

良い点

Great team culture and spirit

Innovative projects and cutting-edge technology

Supportive management and leadership

改善点

High workload and overwhelming demands

Work-life balance challenges

High pressure and stressful deadlines

給与レンジ

6件のデータ

L2

L6

M3

M4

M5

M6

L3

L4

L5

L2 · Graphic Designer L2

0件のレポート

$162,512

年収総額

基本給

$65,005

ストック

$81,256

ボーナス

$16,251

$113,758

$211,266

面接レビュー

レビュー2件

難易度

3.0

/ 5

期間

14-28週間

内定率

50%

面接プロセス

1

Application Review

2

Recruiter Screen

3

Hiring Manager Interview

4

Technical Interview

5

Offer

よくある質問

Technical Knowledge

Behavioral/STAR

Past Experience

Problem Solving