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Physical Design Engineer
- Flow & Methodology
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- MARKHAM, Canada
- Engineering
- 78038
- CAD $124,000.00/Yr.
- CAD $186,000.00/Yr.
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Job Description
WHAT YOU DO AT AMD CHANGES EVERYTHING:
At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.
THE ROLE:
- As a Physical Design Engineer
- Flow & Methodology, you will drive the development, enhancement, and deployment of advanced physical design flows and methodologies across multiple design teams. You will collaborate with cross‑functional partners to create scalable automation, improve execution efficiency, and ensure high‑quality implementation for complex So Cs. This role requires deep technical expertise, strong ownership, and the ability to influence methodology decisions across the organization.
THE PERSON:
You are a highly skilled and experienced engineer with strong fundamentals in physical design, EDA workflows, and large‑scale automation. You excel at dissecting complex design challenges, proposing practical architectural solutions, and driving them through implementation.
You communicate clearly, collaborate effectively, and operate with a mindset of continuous improvement and technical leadership.
KEY RESPONSIBILITIES:
- Architect, develop, and maintain robust physical design flows spanning synthesis, place‑and‑route, STA, power signoff, and physical verification.
- Partner with PD execution teams to resolve flow issues, improve design convergence, and ensure high-quality deliverables across programs.
- Define and drive methodology standards for timing closure, power optimization, hierarchical design, and advanced node implementation challenges.
- Develop automation frameworks, validation utilities, and regression systems to maintain flow and methodology quality.
- Evaluate and integrate new EDA tool capabilities, optimizing for performance, runtime, and QoR.
- Collaborate with library, PDK, and CAD teams to ensure seamless compatibility and best-in-class design enablement.
- Mentor engineers, provide technical guidance, and contribute to documentation and training material for broader adoption of methodologies.
PREFERRED EXPERIENCE:
- Strong background in physical design fundamentals (synthesis, PnR, routing, STA, signoff, power/IR analysis, and physical verification).
- Proficiency with Synopsys, Cadence, and/or Siemens EDA tools for implementation and signoff.
- Demonstrated expertise in Python, Tcl, or similar scripting languages for automation and infrastructure development.
- Experience with design enablement, library interactions, PDK rule integration, and constraint development.
- Proven ability to diagnose and resolve complex flow, QoR, and methodology issues across large designs.
- Strong understanding of modern process nodes, hierarchical design challenges, and advanced timing/power/area tradeoffs.
ACADEMIC CREDENTIALS:
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related discipline.
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
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AMDについて

AMD
PublicAdvanced Micro Devices, Inc. (AMD) is an American multinational semiconductor company headquartered in Santa Clara, California.
10,001+
従業員数
Santa Clara
本社所在地
$240B
企業価値
レビュー
3.7
10件のレビュー
ワークライフバランス
2.8
報酬
3.2
企業文化
4.1
キャリア
3.4
経営陣
3.8
68%
友人に勧める
良い点
Great team culture and spirit
Innovative projects and cutting-edge technology
Supportive management and leadership
改善点
High workload and overwhelming work demands
Work-life balance challenges
High pressure and stressful deadlines
給与レンジ
6件のデータ
L2
L3
L4
L5
L6
L2 · Data Analyst L2
0件のレポート
$76,430
年収総額
基本給
$30,572
ストック
$38,215
ボーナス
$7,643
$53,501
$99,359
面接体験
2件の面接
難易度
3.0
/ 5
期間
14-28週間
内定率
50%
面接プロセス
1
Application Review
2
Recruiter Screen
3
Hiring Manager Interview
4
Technical Interview
5
Offer
よくある質問
Technical Knowledge
Behavioral/STAR
Past Experience
Problem Solving
ニュース&話題
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