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Graduate Trainee - Silicon Design Engineer (SoC)

AMD

Graduate Trainee - Silicon Design Engineer (SoC)

AMD

·

On-site

·

Internship

·

1mo ago

Benefits & Perks

Conference and learning budget

Competitive salary and equity

Design tool subscriptions

Parental leave

Parental Leave

Required Skills

Framer

Principle

Adobe Creative Suite

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  • Silicon Design Engineer (SoC)JOB_DESCRIPTION.SHARE.HTMLCAROUSEL_PARAGRAPHJOB_DESCRIPTION.SHARE.HTMLPenang, Malaysia Engineering77623mail_outline Get future jobs matching this search Loginor Register Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.  Together, we advance your career.   THE ROLE: We are seeking a highly motivated Silicon Design Engineering Graduate Trainee to join our team and work towards design, built, and delivery of AMD’s high-end products. Multiple engineering positions are available across Physical Design (PD), Frontend Integration (FEINT), Design for Test (DFT), and Design Verification (DV). You will contribute to real silicon design projects, collaborate with global teams, and learn industry standard EDA tools and flows. THE PERSON: We are looking for fresh graduates who:Are passionate about semiconductor/digital design Work well in teams across different sites and time zones Show strong analytical and problem solving abilities Are eager to learn and take on technical challenges Communicate clearly and professionallyKEY RESPONSIBILITIES:  Physical Design (PD)Place & Route implementation Timing/physical signoff and tapeout closure Daily task automation and scripting Frontend Integration (FEINT) Logical & physical synthesis Timing Analysis and constraint development Design quality checks Bug fixes generation & low power quality check Design for Test (DFT)Built in Test, JTAG implementation Test pattern generation & gate level simulationDFT debug, coverage improvement, post silicon support Design Verification (DV)Simulation or formal verification environments Testplans, testbenches & testcases Reusable components/System Verilog based/formal/assertion based verificationPREFERRED EXPERIENCE: Verilog/System Verilog Unix/Linux environment Scripting: TCL, Shell, Perl, Python Familiarity with silicon tools tools (e.g., Fusion Compiler, Prime Time, Spy Glass, Tessent, VCS, Xcelium, Questa, VC Formal, Jasper Gold)Strong problem solving skills and attention to detail Ability to independently drive tasks to completion ACADEMIC CREDENTIALS: Bachelors or Masters degree in Electrical and Electronics Engineering, Computer Engineering or related fields LOCATION:Penang, Malaysia Note: By submitting your application, you are indicating your interest in AMD graduate traineepositions. We are recruiting for multiple positions, and if your experience aligns with any of our graduate trainee opportunities, a recruiter will contact you.

Benefits offered are described:  AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider al

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About AMD

AMD

AMD

Public

A semiconductor company that designs and develops graphics units, processors, and media solutions

10,001+

Employees

Santa Clara

Headquarters

Reviews

3.5

25 reviews

Work Life Balance

3.2

Compensation

4.1

Culture

3.6

Career

3.4

Management

3.1

65%

Recommend to a Friend

Pros

Good compensation and benefits

Positive work environment

Great management and coworkers

Cons

Poor work life balance

Micromanagement and excessive tracking

Too much pressure and workload

Salary Ranges

6 data points

L2

L3

L4

L5

L6

L2 · Data Analyst L2

0 reports

$76,430

total / year

Base

$30,572

Stock

$38,215

Bonus

$7,643

$53,501

$99,359

Interview Experience

5 interviews

Difficulty

3.6

/ 5

Duration

14-28 weeks

Offer Rate

60%

Experience

Positive 20%

Neutral 20%

Negative 60%

Interview Process

1

Application Review

2

Recruiter Screen

3

Technical Phone Screen

4

Technical Interview

5

Hiring Manager Interview

6

Offer

Common Questions

Coding/Algorithm

Technical Knowledge

Behavioral/STAR

Past Experience

System Design