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职位AMD

Senior Engineer, Power Systems Design Engineer - Datacenter GPU

AMD

Senior Engineer, Power Systems Design Engineer - Datacenter GPU

AMD

Austin, Texas

·

On-site

·

Full-time

·

5d ago

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.THE ROLE:

In the DCGPU Platform Power Design Team, we design high-technology platforms for world-class products based on AMD’s Instinct Graphics Processing Units (GPU’s). Our team plays a major part in architecting and shaping every graphics board offered by AMD.

We design cutting-edge power converters for our discrete graphics boards that retail around the world. Facing always more stringent demands in terms of the current level, efficiency, and responsiveness, these designs are essential to maximize the performance from our GPU’s in an efficient and cost-effective manner.

KEY RESPONSIBILITIES:

The successful candidate would be responsible for supporting the architecture, design, analysis, and verification of power systems intended for powering high performance CPUs/GPUs/APUs. The engineer will work with cross-functional teams to design and implement a full power delivery network, model and validate PDN impedance and droop targets, and verify power supply integrity using lab and in-situ silicon measurements. The candidate is expected to work and guide the system’s design team to provide optimum component selection and detailed layout guidelines during the design execution phase. In addition, the candidate is expected to work with the Board Validation team to develop test plans/procedures to perform system-level validation for characterizing design margins on the power domains. Other responsibilities include:

  • Work with SoC and System Architects and external industry to drive the latest power delivery technologies and innovations for computers and electronics industry.
  • Analyze and compare solutions, and then drive team insights and architecture forward into system implementation, SoC silicon, and power delivery silicon.
  • Conduct feasibility studies and work with development teams to deliver solutions.
  • Technically mentor junior power engineers in the team and verify their design and validation work.

PREFERRED QUALIFICATIONS:

  • Proven technical understanding of power supply architectures and PDN in server, OAM, and PCIe environments.
  • Understanding of needed design and validation processes to design power circuits for high quality/reliability requirements.
  • Understanding and experience with multi-phase buck/buck-boost regulators, digital PWM controllers, bus converters, LDOs, PMICs, charge pumps, ADCs & DACs, etc
  • Working knowledge of 2D/2.5D EM simulation tools such as Sigrity’s PowerDC, PowerSI, Si Wave or equivalent
  • Strong knowledge of high frequency magnetics design for power electronics
  • Printed circuit board design experience is a must.
  • Expertise in schematic capture, PCB design tools such as Or

CAD or Allegro:

  • Ability to work with multiple cross functional teams to make the right trade-offs on system level performance.
  • Excellent knowledge of control theory, closed loop compensation, stability analysis, phase margin, etc.
  • Proficiency with lab equipment such as oscilloscope, eload, function generator, etc.
  • Experience with analog circuit modeling and simulation tools (e.g. Simplis, PSpice, HSpice etc.) required.
  • Must have good written and verbal communication skills.
  • Knowledge of AMD’s SVIx power management interface

ACADEMIC CREDENTIALS & EXPERIENCE:

  • Bachelor’s or Master's degree (preferred) in Electrical Engineering or related field.

LOCATION:

Austin, TX

This role is not eligible for visa sponsorship

#DCPE

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

THE ROLE:

In the DCGPU Platform Power Design Team, we design high-technology platforms for world-class products based on AMD’s Instinct Graphics Processing Units (GPU’s). Our team plays a major part in architecting and shaping every graphics board offered by AMD.

We design cutting-edge power converters for our discrete graphics boards that retail around the world. Facing always more stringent demands in terms of the current level, efficiency, and responsiveness, these designs are essential to maximize the performance from our GPU’s in an efficient and cost-effective manner.

KEY RESPONSIBILITIES:

The successful candidate would be responsible for supporting the architecture, design, analysis, and verification of power systems intended for powering high performance CPUs/GPUs/APUs. The engineer will work with cross-functional teams to design and implement a full power delivery network, model and validate PDN impedance and droop targets, and verify power supply integrity using lab and in-situ silicon measurements. The candidate is expected to work and guide the system’s design team to provide optimum component selection and detailed layout guidelines during the design execution phase. In addition, the candidate is expected to work with the Board Validation team to develop test plans/procedures to perform system-level validation for characterizing design margins on the power domains. Other responsibilities include:

  • Work with SoC and System Architects and external industry to drive the latest power delivery technologies and innovations for computers and electronics industry.
  • Analyze and compare solutions, and then drive team insights and architecture forward into system implementation, SoC silicon, and power delivery silicon.
  • Conduct feasibility studies and work with development teams to deliver solutions.
  • Technically mentor junior power engineers in the team and verify their design and validation work.

PREFERRED QUALIFICATIONS:

  • Proven technical understanding of power supply architectures and PDN in server, OAM, and PCIe environments.
  • Understanding of needed design and validation processes to design power circuits for high quality/reliability requirements.
  • Understanding and experience with multi-phase buck/buck-boost regulators, digital PWM controllers, bus converters, LDOs, PMICs, charge pumps, ADCs & DACs, etc
  • Working knowledge of 2D/2.5D EM simulation tools such as Sigrity’s PowerDC, PowerSI, Si Wave or equivalent
  • Strong knowledge of high frequency magnetics design for power electronics
  • Printed circuit board design experience is a must.
  • Expertise in schematic capture, PCB design tools such as Or

CAD or Allegro:

  • Ability to work with multiple cross functional teams to make the right trade-offs on system level performance.
  • Excellent knowledge of control theory, closed loop compensation, stability analysis, phase margin, etc.
  • Proficiency with lab equipment such as oscilloscope, eload, function generator, etc.
  • Experience with analog circuit modeling and simulation tools (e.g. Simplis, PSpice, HSpice etc.) required.
  • Must have good written and verbal communication skills.
  • Knowledge of AMD’s SVIx power management interface

ACADEMIC CREDENTIALS & EXPERIENCE:

  • Bachelor’s or Master's degree (preferred) in Electrical Engineering or related field.

LOCATION:

Austin, TX

This role is not eligible for visa sponsorship

#DCPE

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

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关于AMD

AMD

AMD

Public

Advanced Micro Devices, Inc. (AMD) is an American multinational semiconductor company headquartered in Santa Clara, California.

10,001+

员工数

Santa Clara

总部位置

$240B

企业估值

评价

3.7

10条评价

工作生活平衡

2.8

薪酬

3.2

企业文化

4.1

职业发展

3.4

管理层

3.8

68%

推荐给朋友

优点

Great team culture and spirit

Innovative projects and cutting-edge technology

Supportive management and leadership

缺点

High workload and overwhelming work demands

Work-life balance challenges

High pressure and stressful deadlines

薪资范围

6个数据点

L2

L3

L4

L5

L6

L2 · Data Analyst L2

0份报告

$76,430

年薪总额

基本工资

$30,572

股票

$38,215

奖金

$7,643

$53,501

$99,359

面试经验

2次面试

难度

3.0

/ 5

时长

14-28周

录用率

50%

面试流程

1

Application Review

2

Recruiter Screen

3

Hiring Manager Interview

4

Technical Interview

5

Offer

常见问题

Technical Knowledge

Behavioral/STAR

Past Experience

Problem Solving