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职位AMD

Power & Performance Attainment Lead

AMD

Power & Performance Attainment Lead

AMD

Oregon, United States

·

On-site

·

Full-time

·

2w ago

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

THE ROLE:

We are seeking a seasoned SoC Design Engineer with deep expertise—or demonstrated passion—in power efficiency, thermal modeling, di/dt and droop analysis, and strong proficiency with power/performance tools complemented by a solid software background. The ideal candidate has a proven track record of driving product requirements, execution, and long‑term strategy for power/performance tools and methodologies.

You are meticulous in balancing Power, Performance, and Area (PPA) while meeting aggressive schedules and cost targets. This senior‑level role offers the opportunity to shape new technical directions, collaborate with a world‑class, patent‑holding engineering community, and influence decisions across design teams, marketing, and business unit leadership.

THE PERSON:

You bring strong communication and presentation skills, exceptional analytical and problem‑solving abilities, and demonstrated project leadership in complex environments. You are self‑directed, comfortable navigating ambiguity, and capable of leading through influence in a highly cross‑functional, matrixed organization.

Mandatory experience includes pre‑silicon power/performance tool development, close collaboration with software and CAD teams, and deep domain knowledge in power efficiency and di/dt diagnostic coverage. Recognition as a thoughtful technical leader or industry methodologist in this space is highly valued.

You are highly collaborative, adept at working with top engineers and senior architects across geographies, and motivated to mentor, guide, and elevate the technical capabilities of those around you. You have a proven ability to deliver high‑quality outcomes through influence rather than authority.

KEY RESPONSIBILITIES:

  • Advance state‑of‑the‑art power efficiency and diagnostic methodologies, including worst‑case workload analysis to define SoC and platform specifications
  • Drive end‑to‑end power/performance tools and flow development, spanning software and complete PPA methodologies
  • Partner with business units to define product configurations, capabilities, and targets relevant to power and performance domains
  • Lead performance profiling and power‑constrained optimization using modeling results to forecast and achieve targets across development cycles
  • Track simulation and/or emulation results and correlate silicon behavior with model predictions
  • Analyze underperformance using advanced methodologies and identify root causes
  • Coordinate and drive corrective action plans across teams

PREFERRED EXPERIENCE:

  • Demonstrated expertise in power diagnostic coverage, including socket‑ and platform‑level projections and identification of architectural worst‑case scenarios with system‑level correlation
  • Deep knowledge of power management microarchitecture, power optimization techniques, and power impact across architecture, logic, and circuit levels
  • Advanced experience with power‑constrained performance analysis and optimization of modern So Cs (CPU, GPU, and hardware accelerators)xcellent understanding of computer architecture and organization
  • Solid grasp of model‑based performance and power analysis, including power and thermal management practices
  • Strong analytical skills with attention to data quality; experience with data mining and machine learning is a plus
  • Experience analyzing CPU, GPU, or system‑level microarchitectural features to identify performance bottlenecks across workloads
  • Proficient programming skills, with Python preferred

ACADEMIC CREDENTIALS:

Bachelor’s or Master’s degree in related discipline preferred

This role is not eligible for visa sponsorship.

*Benefits offered are described: *AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

THE ROLE:

We are seeking a seasoned SoC Design Engineer with deep expertise—or demonstrated passion—in power efficiency, thermal modeling, di/dt and droop analysis, and strong proficiency with power/performance tools complemented by a solid software background. The ideal candidate has a proven track record of driving product requirements, execution, and long‑term strategy for power/performance tools and methodologies.

You are meticulous in balancing Power, Performance, and Area (PPA) while meeting aggressive schedules and cost targets. This senior‑level role offers the opportunity to shape new technical directions, collaborate with a world‑class, patent‑holding engineering community, and influence decisions across design teams, marketing, and business unit leadership.

THE PERSON:

You bring strong communication and presentation skills, exceptional analytical and problem‑solving abilities, and demonstrated project leadership in complex environments. You are self‑directed, comfortable navigating ambiguity, and capable of leading through influence in a highly cross‑functional, matrixed organization.

Mandatory experience includes pre‑silicon power/performance tool development, close collaboration with software and CAD teams, and deep domain knowledge in power efficiency and di/dt diagnostic coverage. Recognition as a thoughtful technical leader or industry methodologist in this space is highly valued.

You are highly collaborative, adept at working with top engineers and senior architects across geographies, and motivated to mentor, guide, and elevate the technical capabilities of those around you. You have a proven ability to deliver high‑quality outcomes through influence rather than authority.

KEY RESPONSIBILITIES:

  • Advance state‑of‑the‑art power efficiency and diagnostic methodologies, including worst‑case workload analysis to define SoC and platform specifications
  • Drive end‑to‑end power/performance tools and flow development, spanning software and complete PPA methodologies
  • Partner with business units to define product configurations, capabilities, and targets relevant to power and performance domains
  • Lead performance profiling and power‑constrained optimization using modeling results to forecast and achieve targets across development cycles
  • Track simulation and/or emulation results and correlate silicon behavior with model predictions
  • Analyze underperformance using advanced methodologies and identify root causes
  • Coordinate and drive corrective action plans across teams

PREFERRED EXPERIENCE:

  • Demonstrated expertise in power diagnostic coverage, including socket‑ and platform‑level projections and identification of architectural worst‑case scenarios with system‑level correlation
  • Deep knowledge of power management microarchitecture, power optimization techniques, and power impact across architecture, logic, and circuit levels
  • Advanced experience with power‑constrained performance analysis and optimization of modern So Cs (CPU, GPU, and hardware accelerators)xcellent understanding of computer architecture and organization
  • Solid grasp of model‑based performance and power analysis, including power and thermal management practices
  • Strong analytical skills with attention to data quality; experience with data mining and machine learning is a plus
  • Experience analyzing CPU, GPU, or system‑level microarchitectural features to identify performance bottlenecks across workloads
  • Proficient programming skills, with Python preferred

ACADEMIC CREDENTIALS:

Bachelor’s or Master’s degree in related discipline preferred

This role is not eligible for visa sponsorship.

*Benefits offered are described: *AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

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关于AMD

AMD

AMD

Public

Advanced Micro Devices, Inc. (AMD) is an American multinational semiconductor company headquartered in Santa Clara, California, with significant operations in Austin, Texas.

10,001+

员工数

Santa Clara

总部位置

$240B

企业估值

评价

3.5

25条评价

工作生活平衡

3.2

薪酬

4.1

企业文化

3.6

职业发展

3.4

管理层

3.1

65%

推荐给朋友

优点

Good compensation and benefits

Positive work environment

Great management and coworkers

缺点

Poor work life balance

Micromanagement and excessive tracking

Too much pressure and workload

薪资范围

5个数据点

C-Suite

M3

M4

M5

M6

Principal/L7

VP

C-Suite · Product Manager L10

0份报告

$444,000

年薪总额

基本工资

-

股票

-

奖金

-

$377,400

$510,600

面试经验

5次面试

难度

3.6

/ 5

时长

14-28周

录用率

60%

体验

正面 20%

中性 20%

负面 60%

面试流程

1

Application Review

2

Recruiter Screen

3

Technical Phone Screen

4

Technical Interview

5

Hiring Manager Interview

6

Offer

常见问题

Coding/Algorithm

Technical Knowledge

Behavioral/STAR

Past Experience

System Design