Waymo is an autonomous driving technology company with the mission to be the world's most trusted driver. Since its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the Waymo Driver—The World's Most Experienced Driver™—to improve access to mobility while saving thousands of lives now lost to traffic crashes. The Waymo Driver powers Waymo’s fully autonomous ride-hail service and can also be applied to a range of vehicle platforms and product use cases. The Waymo Driver has provided over ten million rider-only trips, enabled by its experience autonomously driving over 100 million miles on public roads and tens of billions in simulation across 15+ U.S. states.

Waymo's Compute Team is tasked with a critical and exciting mission: We deliver the compute platform responsible for running the fully autonomous vehicle's software stack. To achieve our mission, we architect and create high-performance custom silicon; we develop system-level compute architectures that push the boundaries of performance, power, and latency; and we collaborate closely with many other teammates to ensure we design and optimize hardware and software for maximum performance. We are a multidisciplinary team seeking curious and talented teammates to work on one of the world's highest performance automotive compute platforms.

This role follows a hybrid work schedule and you will report to a Hardware Engineering Manager.

You will:

• Perform DDR, LPDDR, HBM, and other advanced DRAM subsystem bring-up, validation, and characterization

• Collaborate with DV and emulation teams in the pre-silicon phase, and create post-silicon test plans

• Characterize and optimize the memory subsystem performance under concurrent and stress workload

• Spearhead the silicon debug efforts related to DRAM controller, PHY, and DRAMs

• Engage and assist in defining the manufacturing tests (BIST, ATE, SLT)

You have:

• Bachelor's degree with 5+ years of experience in advanced DRAM memory subsystem

• Hands-on experience in silicon bring-up, functional validation, characterization, and performance optimization related to memory subsystem

• Experience in generating memory stress content or patterns

• Experience in silicon debug involving memory subsystem

• Knowledge in JEDEC spec of DDR/LPDDR/HBM

• Knowledge of SoC architecture, memory subsystem, NoC

We prefer:

• Experience in DRAM firmware, init and training sequence

• Experience in pre-silicon verification and emulation, integrate VIPs in testbench

• Familiar with the lab equipment for bring-up, validation and debug

• Proficiency in at least one of the programming or scripting languages: C/C++, Python

The expected base salary range for this full-time position is listed below. Actual starting pay will be based on job-related factors, including exact work location, experience, relevant training and education, and skill level. Waymo employees are also eligible to participate in Waymo’s discretionary annual bonus program, equity incentive plan, and generous Company benefits program, subject to eligibility requirements.

Salary Range**₹3,200,000—₹3,870,000 INR**