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Job Details:
Job Description:
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Performs functional verification of graphics logic components, including 3D graphics, media, and display, to ensure design will meet specification requirements
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Defines and develops scalable and reusable IP verification plans, test benches, and architecture for verification environment to ensure coverage to confirm to graphics microarchitecture specifications
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Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs
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Replicates, root causes, and debugs issues in the presilicon environment
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Finds and implements corrective measures to resolve failing tests
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Collaborates with GPU architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and to meet functional, performance, and power goals
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Documents test plans and drives technical reviews of plans and proofs with design and architecture teams
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Maintains and improves existing functional verification infrastructure and methodology
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Participates in the definition of verification infrastructure and related TFMs needed for functional design verification
Qualifications:
Minimum Qualifications:
- Bachelor's degree in electronics, computer engineering, or related engineering with 4+ years of experience in silicon design development
OR
- Master's degree in electronics, computer engineering, or related engineering with 3+ years of experience in silicon design development
At least 4 years of experience in the following:
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Test Bench bring-up at IP level and strong programming skills in System Verilog, OVM and UVM
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Hands on verification experience working on ASIC, CPU or GPU
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Test Plan development experience at IP level with coverage closures
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Coverage driven verification testbench development functional modeling and test writing
Preferred Qualifications:
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Understanding of Graphics architecture
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Experience with industry standard frontend design and verification flows, tools, methodology
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Experience with scripting shell, PERL, python
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Job posting details (such as work model, location or time type) are subject to change.
For information on Intel’s immigration sponsorship guidelines, please see Intel U.S.
Immigration Sponsorship Information:
Job Type:
Experienced Hire
Shift:
Shift 1 (United States of America)
Primary Location:
US, California, Santa Clara
Additional Locations:
US, California, Folsom, US, Oregon, Hillsboro
Business group:
Intel makes possible the most amazing experiences of the future. You may know us for our processors. But we do so much more. Intel invents at the boundaries of technology to make amazing experiences possible for business and society, and for every person on Earth. Harnessing the capability of the cloud, the ubiquity of the Internet of Things, the latest advances in memory and programmable solutions, and the promise of always-on 5G connectivity, Intel is disrupting industries and solving global challenges. Leading on policy, diversity, inclusion, education and sustainability, we create value for our stockholders, customers, and society.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $141,910.00-269,100.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
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About Intel

Intel
PublicIntel inside.
120,000+
Employees
Santa Clara
Headquarters
$200B
Valuation
Reviews
3.5
3 reviews
Work Life Balance
3.0
Compensation
3.0
Culture
2.5
Career
2.5
Management
2.0
25%
Recommend to a Friend
Pros
Offers internship opportunities
Interview opportunities available
Cons
Major job cuts and layoffs
Spam emails after rejection
Poor communication practices
Salary Ranges
6 data points
Senior/L5
Senior/L5 · Advanced Field Service Engineering Data Analyst
1 reports
$132,904
total / year
Base
$102,234
Stock
-
Bonus
-
$132,904
$132,904
Interview Experience
2 interviews
Difficulty
3.0
/ 5
Duration
14-28 weeks
Interview Process
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Onsite/Virtual Interviews
5
Team Matching
6
Offer
Common Questions
Coding/Algorithm
Technical Knowledge
Behavioral/STAR
System Design
Past Experience
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