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Lead FPGA Engineer

GE Vernova

Lead FPGA Engineer

GE Vernova

Hyderabad, India

·

On-site

·

Full-time

·

2w ago

Required Skills

FPGA design

Digital circuit design

System level analysis

Job Description Summary

Lead FPGA Engineer will be responsible for leading/executing complex FPGA design projects and solutions. You will work in a global environment with skilled team of engineers creating and improving a state-of-the-art platform for use in every kind of power generation application.

Job Description:

Essential Responsibilities:

  • Select the FPGA, CPLD family and chip suitable for the application.
  • Develop FPGA design requirements based on system requirements document.
  • Define FPGA interfaces with other circuitry along with hardware design engineer.
  • Do FPGA programming, synthesis and simulation, timing analysis and optimization.
  • Validate system along with the hardware and firmware design engineers to confirm about functionality, reliability, efficiency, compatibility and responsiveness.
  • Work on FPGA-based solutions for interfacing real-time microprocessor systems to high speed Networks and I / O
  • Actively drive design rigor and participate in relevant formal design reviews
  • Contribute to board level reliability analysis and system FMEA
  • Identify opportunities to modify/author DPs
  • Identify cost-out opportunities and make technical proposals
  • Lead/ Participate on teams assigned to address organizational initiatives.

Qualifications/Requirements

  • Bachelor / Masters in Electronics Engineering, Electronics & communication, Computer Engineering or equivalent.
  • 8-10 years of experience in FPGA design, digital circuit design, system level analysis, Product Development life cycle including system and Sub-system Design
  • Proven analytical and organizational ability
  • Strong interpersonal and leadership skills
  • Strong oral and written communication skills
  • Effective problem identification and solution skills

Desired Characteristics

  • Hands on experience in Verilog, VHDL, FPGA development tools, including design, synthesis, simulation, timing analysis, optimization, packaging and debug
  • Expertise in Signal Integrity and simulations
  • Knowledge about different communication techniques
  • Hands on experience in developing the interfaces between FPGA and other devices like microprocessors, ADCs, transceivers and so on.
  • Strong experience of High-speed digital designs, Proficiency in ECAD suite of tools either from Mentor Graphics or Cadence would be an added advantage.
  • Should have a good understanding of EMI/EMC concepts related to high speed designs and debug issues.
  • Experience working with Industry protocols like MODBUS, FF, CAN, Ethernet
  • Ability to coordinate several projects simultaneously.
  • Experience in Agile methodology.

Additional Information:

Relocation Assistance Provided: Yes

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About GE Vernova

GE Vernova

GE Vernova provides energy consulting, gas power, and grid solutions.

10,001+

Employees

Boston

Headquarters

Reviews

3.8

34 reviews

Work Life Balance

3.7

Compensation

3.7

Culture

3.8

Career

3.7

Management

3.6

77%

Recommend to a Friend

Pros

Good work-life balance and flexible environment

Opportunity for career growth

Competitive compensation and benefits

Cons

Room for improvement in processes

Internal communication could improve

Some organizational bureaucracy

Salary Ranges

309 data points

Junior/L3

Junior/L3 · Business Analyst

0 reports

$92,460

total / year

Base

-

Stock

-

Bonus

-

$78,591

$106,329

Interview Experience

4 interviews

Difficulty

3.3

/ 5

Duration

14-28 weeks

Experience

Positive 0%

Neutral 50%

Negative 50%

Interview Process

1

HR Interview

2

Digital Interview

3

Technical Rounds

4

Hiring Manager Interview