Senior Engineer FPGA Engineer

Job Overview:

As a member of this team, your role will involve building an understanding of incoming Arm IP RTL & SoC designs and making the relevant design changes to implement a prototype of this ASIC RTL on FPGA. This includes RTL integration, design, modifications, simulation/verification and validation on hardware of FPGA specific IPs and peripherals into the larger SoC prototype.

You'll be part of a project team responsible for delivery of the prototype for enablement and validation, working collaboratively with other teams in Arm. You’ll have responsibilities estimating and owning tasks, delivering against a plan and have a strong focus on engineering efficiency and quality.

Responsibilities:

• Development and verification of subsystems, peripherals, and IPs used for FPGA prototyping purposes.
• Modifying ASIC RTL from sophisticated systems to target a dedicated FPGA prototyping platform.
• Debugging of test failures and issues by working in collaboration with the design teams and FPGA users.

Required Skills and Experience:

• Strong RTL skills in Verilog / System Verilog with source code under version control.
• Experience 4 to 7 years is a Must. 
• Understanding of Arm based systems, including SoC system architecture and AMBA protocols.
• Experience of working with high speed I/O peripherals, such as LPDDR, PCIe, Ethernet, USB, HBM etc. with expertise in debugging in both simulation and hardware.
• Experience with Tcl, Python or other scripting languages.

“Nice To Have” Skills and Experience:

• Exposure to the FPGA design flow from RTL design, simulation, synthesis, place & route, constraints, and timing closure
• Demonstrate an understanding of ASIC/SoC prototyping in FPGA.
• Experience improving FPGA performance, partitioning strategies, and timing closure methodologies
• Experience with hardware emulation platforms (Zebu, Veloce, Palladium) from leading EDA vendors (Synopsys, Siemens, or Cadence).
• Programming languages such as: assembly language (ideally Arm assembler), higher-level (e.g. C), object-orientated (e.g. C++)
• Use of a UNIX environment and shell programming

Accommodations at Arm

At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email accommodations@arm.com. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process.

Hybrid Working at Arm

Arm’s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team’s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you.

Equal Opportunities at Arm

Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.