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CPU Full Chip Physical Integration Engineer

Apple

CPU Full Chip Physical Integration Engineer

Apple

Austin, TX

·

On-site

·

Full-time

·

2w ago

Benefits & Perks

Healthcare

401(k)

Equity

Learning Budget

Relocation Assistance

Healthcare

401k

Equity

Learning

Required Skills

Perl

TCL

Physical Design

Place and Route

Floorplanning

Physical Verification

Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish! Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Do you want join us in these pursuits? Join us to help deliver the next groundbreaking Apple product!
In this highly visible role, you will be at the center of a processor design effort interfacing with all disciplines, with a critical impact on getting functional products to millions of customers quickly.

Description:

As a Full Chip Integration Engineer, you will be participating in the physical design, integration, and verification of high performance, low power processor development.

  • Full chip floorplan, area optimizations, block partitioning and pin placements

  • Own chip level place and route (PnR), final CPU layout database construction and verification (PDV)

  • Develop and validate Power Grid, including routability analysis

  • Drive custom layout integration, block and full-chip level EM/IR, electrical verification/analysis as well as formal verification

  • Work with the implementation/CAD teams during the entire chip design cycle to drive signoff closure for tapeout

  • Work with the SOC team to meet IP technical and delivery requirements

  • Participate in establishing CAD and physical design methodologies and flow development for chip integration and analysis

  • Scripting to automate tasks and improve debug efficiency

Preferred Qualifications:

Knowledge of industrial standards and practices in Physical Design, including Floorplanning, Partitioning, Budgeting, Place and Route and Physical Verification

Experience in developing and implementing Power Grid and Clock specifications

Solid knowledge of Low Power Design, Physical Construction, Integration, EMIR (Drop/Noise), SIGEM Analysis, Formal Verification, Physical PDV, DRC/LVS Verification, and DFM

Solid understanding of verification tools such as Conformal LP, LEC, Red Hawk, Calibre

Solid understanding of CMOS circuit design. Layout design background is a plus

Working knowledge of Extraction and STA methodology and tools

Working knowledge of Computer Architecture:

Ability to work well in a team, being an excellent problem solver, and self motivated

Minimum Qualifications:

Minimum BS and 10+ years of relevant industry experience

Experience with scripting in Perl or TCL:

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant .

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About Apple

Apple

Apple

Public

A technology company that designs, manufactures, and markets consumer electronics, personal computers, and software.

10,001+

Employees

Cupertino

Headquarters

$3.5T

Valuation

Reviews

4.0

10 reviews

Work Life Balance

4.0

Compensation

4.2

Culture

3.8

Career

3.5

Management

3.2

75%

Recommend to a Friend

Pros

Great coworkers and people

Excellent benefits and perks

Fast-paced and engaging work environment

Cons

High expectations and pressure

Management quality varies

Limited career progression opportunities

Salary Ranges

17,968 data points

L2

L3

L4

L5

L6

L2 · Business Analyst L2

0 reports

$114,215

total / year

Base

$45,686

Stock

$57,108

Bonus

$11,422

$79,951

$148,480

Interview Experience

5 interviews

Difficulty

3.4

/ 5

Duration

28-42 weeks

Offer Rate

20%

Experience

Positive 20%

Neutral 40%

Negative 40%

Interview Process

1

Application Review

2

Recruiter Screen

3

Technical Phone Screen

4

Behavioral Interview

5

Onsite/Virtual Interviews

6

Team Matching

7

Offer

Common Questions

Coding/Algorithm

System Design

Behavioral/STAR

Technical Knowledge

Culture Fit