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About Analog Devices
Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at www.analog.com and on LinkedIn and Twitter (X).
Staff Design Verification Engineer (P4)
Analog Devices is expanding our team that architects, designs, and verifies Foundational Security Solutions to internal and external customers. This is an excellent opportunity to be part of a growing team with visibility and access across the company’s Business Units developing a wide range of leading-edge IC solutions that require or benefit from Secure HW/FW/SW.
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Responsibilities include but not limited to:Architect, document, and build UVM test benches to verify blocks, subsystems, and SOC level IP
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Develop test plans based on Requirements and HW design specifications
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Work within a UVM System Verilog environment to develop tests achieving high coverage vs. specification and use cases
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Debug and solve complex problems that require GLS, AMS DV collaboration, lab evaluation issue recreation, and fault injection/detection techniques
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Lead and become technical mentor to local DV team
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Continual review and improvement of verification methodology and tools
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Actively track and proactively communicate status to extended team and management using Agile development practices
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The ideal candidate will meet the following requirements: 7+ years digital verification experience
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Expert-level knowledge in System Verilog and UVM
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AI enabled DV development including testbench, rootcause analysis and coverage closure
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Experience profile applying DV techniques in the following areas:Legacy and Post Quantum crypto accelerators in SW, HW, and mixed mode domains
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Portable testing navigating block, subsystem, and chip level verification environments
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MCU-based digital and mixed signal SOC's
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FPGA, HW emulation, SystemC platforms
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Experience with languages such as Python, SystemC, C/C++
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Experience leading DV teams embedded into larger cross-functional product development teams
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Able to set priorities, deliver on commitments, work autonomously
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Reuse mindset and demonstrated experience
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BSEE/MSEE
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For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S.
Department of Commerce:
- Bureau of Industry and Security and/or the U.S.
Department of State:
- Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.
Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.
Job Req Type: Experienced
Required Travel: Yes, 10% of the time
Shift Type: 1st Shift/Days
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About Analog Devices

Analog Devices (NYSE: ADI) defines innovation and excellence in signal processing. ADI's analog, mixed-signal, and digital signal processing (DSP) integrated circuits (IC) play a fundamental role in converting, conditioning, and processing real-world phenomena such as light, sound, temperature, motion, and pressure into electrical signals to be used in a wide array of electronic equipment.
10,001+
Employees
Norwood
Headquarters
$95B
Valuation
Reviews
2.8
10 reviews
Work Life Balance
2.0
Compensation
3.5
Culture
2.5
Career
3.0
Management
1.8
35%
Recommend to a Friend
Pros
Good pay and compensation
Interesting technology and smart people
Good benefits and stock options
Cons
Poor management and leadership
Bad work-life balance and overwork
High stress environment
Salary Ranges
698 data points
Mid/L4
Senior/L5
Mid/L4 · Design Engineer
156 reports
$128,650
total / year
Base
$107,160
Stock
$9,101
Bonus
$6,173
$95,549
$177,538
Interview Experience
4 interviews
Difficulty
3.5
/ 5
Duration
14-28 weeks
Experience
Positive 25%
Neutral 75%
Negative 0%
Interview Process
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Technical Interview Rounds
5
Hiring Manager Interview
6
Final Round/Decision
Common Questions
Technical Knowledge
Coding/Algorithm
System Design
Past Experience
Behavioral/STAR
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