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Job Details:
Job Description:
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We are looking for an enthusiastic engineer to work with Intel's latest cutting-edge memory technologies.
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As part of the Memory Validation Team you will enable, validate, and debug the Memory subsystem within Intel's mobile, desktop and IOT CPU products.
As a Memory Electrical Validation Engineer Responsibilities will include but are not limited to:
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Define electrical validation strategy for memory IO interfaces to achieve optimized electrical performance and meet product production goals.
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Validate circuit analog performance, electrical signal integrity compliance to industry standard specifications, and system level margin for stable operation and production target prediction.
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Define MRC (Memory Reference Code) requirements for validation and margin optimization and analyzes, validates, debugs, and optimizes MRC steps and values to optimize margins and quality.
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Conduct and participate in multidisciplinary research in the design, development, testing, validation, and utilization of memory IO and mixed signal architectures inclusive of industry standard datacom applications and custom Intel interfaces.
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Develop procedures, analysis, and designs for validation, validation infrastructure, and systems margin validation.
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Analyse internal and external customer returns with emphasis on improving yields and driving test escape closure.
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Apply and use independent evaluation to select components and equipment based on analysis of specifications, performance, and reliability.
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Perform debug to identify root causes and resolves all functional and triage failures for electrical issues.
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Test interactions between various electrical design features using validation infrastructure.
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Prepare validation specifications, evaluates IP, and generates test reports.
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Ensure products conform to standards and specifications.
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Present data and analysis to technical forums.
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Experience in System marginality validation (SMV) & Singal Integrity compliance validation (SICV)
Qualifications:Minimum Qualifications:
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EE (Electrical Engineering or Computer Science) BS or MS degree .
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6-12 years of hands-on experience in Memory Electrical/Analog Validation such as signal integrity and signal margining validation.
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Experience in Memory Firmware.
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Experience in Mixed signal IP electrical validation.
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Proficiency in DDR5/ LPDDR5 .
Preferred Qualifications:
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Familiar with Intel collateral (PDG, EDS) and tools (ITP, Python SV).
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Hands-on usage of relevant lab equipment and debugs.
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Technical depth and leadership skills.
Job Type:
Experienced Hire
Shift:
Shift 1 (India)
Primary Location:
India, Bangalore
Additional Locations:
Business group:
The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness that power Intel’s leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Work Model for this Role
This role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
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About Intel

Intel
PublicIntel inside.
120,000+
Employees
Santa Clara
Headquarters
$200B
Valuation
Reviews
3.5
3 reviews
Work Life Balance
3.0
Compensation
3.0
Culture
2.5
Career
2.5
Management
2.0
25%
Recommend to a Friend
Pros
Offers internship opportunities
Interview opportunities available
Cons
Major job cuts and layoffs
Spam emails after rejection
Poor communication practices
Salary Ranges
6 data points
Senior/L5
Senior/L5 · Advanced Field Service Engineering Data Analyst
1 reports
$132,904
total / year
Base
$102,234
Stock
-
Bonus
-
$132,904
$132,904
Interview Experience
2 interviews
Difficulty
3.0
/ 5
Duration
14-28 weeks
Interview Process
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Onsite/Virtual Interviews
5
Team Matching
6
Offer
Common Questions
Coding/Algorithm
Technical Knowledge
Behavioral/STAR
System Design
Past Experience
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