Job Details:

Job Description:

This position requires candidates to upload a resume in English; you are welcome to upload multiple versions of your resume if you prefer but an English version of your resume will be required to be considered for this position.

The SoC Functional Validation Engineer is responsible for defining, developing, and performing functional validation for integrated Systems‑on‑Chip (So Cs). The role focuses on validating IP integrations, interactions between multiple IP blocks, and system‑level features to ensure that the final silicon meets performance, power, area, and functional expectations.

This position applies a wide range of hardware and software validation tools and methodologies, reviews design changes to determine their impact on validation plans and collaborates with cross‑functional engineering teams across all phases of the product life cycle. The engineer will contribute to validation methodologies, test plans, execution, silicon debug, infrastructure development, and reporting to ensure silicon readiness and product quality.

Key Responsibilities

• Define, develop, and execute SoC functional validation plans for integrated So Cs.
• Validate IP integration, IP‑to‑IP interactions, and system‑level features using hardware and software validation tools.
• Review proposed design changes to assess impacts on validation scope, tasks, and schedules.
• Develop SoC validation methodologies, test plans, and coverage strategies.
• Perform silicon debug to identify root causes of functional failures and triage issues related to SoC features.
• Test and validate interactions between various SoC features using established validation infrastructure.
• Develop post‑silicon validation infrastructure, including performance monitors, behavioral checkers, and state‑space coverage tools.
• Create and maintain validation environments used across validation testing.
• Publish SoC validation reports summarizing validation activities, review results, and communicate findings to relevant teams.
• Partner with architecture, design, verification, board, platform, and manufacturing teams to improve debug capabilities, validation strategies, methodologies, and overall processes.
• Develop validation content to enable or enhance specific IP interactions using techniques such as microcode patching, firmware modifications, or custom OS builds.
• Participate in all phases of the product lifecycle and validate content, infrastructure, and bug hunts across environments such as simulation, emulation, and FPGA platforms to ensure silicon readiness.

Behavioral Traits

• Problem‑Solving Mindset: Approaches complex technical challenges with curiosity, creativity, and structured analytical thinking.
• Collaboration Skills: Works effectively with cross‑functional engineering teams, seeks input from partners, and communicates clearly in both technical and non‑technical contexts.
• Adaptability and Learning Agility: Quickly learns new tools, technologies, and methodologies; comfortable working in evolving development environments.
• Attention to Detail: Delivers high‑quality, reliable, and scalable software solutions with a focus on robustness, validation, and secure coding practices.
• Results‑Oriented: Prioritizes effectively, manages time well, and drives solutions to completion in a fast‑paced engineering environment.
• Innovation and Continuous Improvement: Looks for opportunities to optimize tools, simplify workflows, and introduce new methodologies that enhance engineering efficiency.

Qualifications:

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

• Bachelor's or Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
• 5+ years of total experience including experience in the following areas:Working/developing test plans
• Developing in a Linux/UNIX environment.
• Object-oriented programming in coding any of the languages: C, C++, C#, Perl and/or Python Software.
• Hardware, system bring-up, and/or silicon power-on.
• Advanced English level.
• Must have unrestricted, permanent right to work in Mexico (this role is not eligible for visa or immigration sponsorship).

Preferred Qualifications:

• Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
• 8+ years of experience with one or more of the following:Hardware/RTL development or debug experience, RTL debug, review Verilog code and correlate with waveform captures
• Developing test automation frameworks
• Debugging or developing fpga/emulation models
• Firmware/Software debug of large C/C++ applications, provide fixes, GitHub knowledge
• Experience with design and derive testing for system clock/system reset flows.
• PCIe protocol and/or PCIe interfaces testing experience.
• Lab equipment (Logic Analyzers, Oscilloscopes, protocol analyzers).
• Compression, Cryptography, and/or virtualization standards.

Job Type:

Experienced Hire

Shift:

Shift 1 (Mexico)

Primary Location:

Mexico, Guadalajara

Additional Locations:

Business group:

At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership. Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.