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Job Details:
Job Description:
The Data Center Pre-Si FPGA Development Intern contributes to the functional logic verification of silicon designs, ensuring they meet defined specifications and architectural requirements. This role supports the creation and execution of verification plans, development of test benches, and enhancement of verification environments to achieve comprehensive functional and architectural coverage. The intern will work alongside experienced engineers, gaining hands-on experience with pre-silicon validation methodologies in a highly collaborative environment.
Key Responsibilities
- Contribute to the functional logic verification of silicon designs to ensure compliance with specifications.
- Support the development of verification plans, test benches, and verification environments targeting full architectural coverage.
- Assist in simulation and emulation activities to validate functionality, analyze power and performance behaviors, and identify defects or inconsistencies.
- Participate in debug and root-cause analysis, helping implement corrective measures to resolve design issues.
- Collaborate closely with architecture and design teams to ensure functional correctness and implementation efficiency.
- Learn and apply verification methodologies, tools, and best practices through hands-on project work.
- Engage in meaningful projects that support Intel’s business goals while exploring potential future career opportunities.
What You Will Learn
- Industry-standard pre-silicon verification flows and tools.
- Best practices for developing robust and reusable verification environments.
- Techniques for debugging, root-cause analysis, and performance evaluation.
- Cross-functional collaboration within architecture, design, and validation teams.
Qualifications:
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
- Currently pursuing Bachelor, Master or PhD degree in Computer Science or related degree (at least 50 percent of courses approved)
- 3+ months of experience in:Digital Design such as: Combinational, Synchronous (state machines) or Asynchronous.
- Hardware Description Languages such as Verilog or VHDL or System Verilog.
- One or more programming languages such as C, C++, Python, Perl, or Java.
- 1+ month of experience with executing commands at a command prompt.
- Advance English level.
- Must have unrestricted, permanent right to work in Mexico (this role is not eligible for visa or immigration sponsorship).
Preferred Qualifications:
- Computer architectures and interfaces such as USB, UART, SPI, I2C, PCIe, etc.
- Knowledge and experience on Linux OS.
Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
A candidate who accepts an offer of employment in Mexico is required to present their own personal identification information and numbers for the following: Mexican Security Number (NSS), Tax Identification Number (RFC) and CURP identification number.
Job Type:
Student / Intern
Shift:
Shift 1 (Mexico)
Primary Location:
Mexico, Guadalajara
Additional Locations:
Business group:
At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership. Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
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About Intel

Intel
PublicIntel inside.
120,000+
Employees
Santa Clara
Headquarters
$200B
Valuation
Reviews
3.5
3 reviews
Work Life Balance
3.0
Compensation
3.0
Culture
2.5
Career
2.5
Management
2.0
25%
Recommend to a Friend
Pros
Offers internship opportunities
Interview opportunities available
Cons
Major job cuts and layoffs
Spam emails after rejection
Poor communication practices
Salary Ranges
6 data points
Senior/L5
Senior/L5 · Advanced Field Service Engineering Data Analyst
1 reports
$132,904
total / year
Base
$102,234
Stock
-
Bonus
-
$132,904
$132,904
Interview Experience
2 interviews
Difficulty
3.0
/ 5
Duration
14-28 weeks
Interview Process
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Onsite/Virtual Interviews
5
Team Matching
6
Offer
Common Questions
Coding/Algorithm
Technical Knowledge
Behavioral/STAR
System Design
Past Experience
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