招聘
Job Details:
Job Description:
Do Something Wonderful!
Intel put Silicon in Silicon Valley. No one else is obsessed with engineering and has a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow.
Who We Are Come join Intel's Devices Development Group, responsible for creating leading Client SOCs. We envision the future of computing and design for the next generation of laptop and desktop computers. We are looking for a Senior SoC Analog Engineer, ready to research, design, develop, and test Intel designs as we reimagine how to build SOCs at Intel and in the semiconductor industry. Our bold purpose as a company is to 'create world-changing technology that enriches the lives of every person on earth' and this role is instrumental in furthering our mission to shape the future of technology.
Who You Are:
Some of the responsibilities of this role will include but are not limited to:
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Designs, develops, and builds analog circuits in advanced process nodes for analog and mixed signal IPs.
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Designs floorplans, performs circuit design, extracts chip parameters, and simulates analog behavior models.
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Creates test plans to verify design according to circuit and block microarchitecture specifications and evaluates test results.
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Verifies functionality to optimize circuit for power, performance, area, timing, and yield goals.
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Collaborates cross functionally to report design progress and collects, tracks, and resolves any performance and circuit design issues.
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Optimizes performance, power, area, and reduces leakage of circuits.
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Works with architecture and layout team to design circuits for best functionality, robustness, and electrical capabilities.
Qualifications:
You must possess the minimum education requirements and minimum required qualifications to be initially considered for this position. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications
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The candidate must have a Bachelor's Degree in Electrical Engineering, Computer Engineering, or STEM related field of study and 4+ years of relevant experience -OR- Master’s Degree in in Electrical Engineering, Computer Engineering, or STEM related field of study and 3+ years of relevant experience
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At least 3+ years of experience with advanced CMOS processes (16nm and below)
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At least 3+ years of experience in Design Implementation and methodology, specifically in Custom/Analog Mixed-Signal Design/Layout
Preferred Qualifications
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Post Graduate degree in Electrical / Computer Engineering, Computer Science, or in a STEM related field of study.
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Experience with analog tools and flows: Schematic entry, analog simulation, extraction, post layout simulation, reliability validation.
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Experience with custom layout of analog blocks and Layout migration b/w different advanced FINFET and GAA tech nodes.
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Experience in design of analog/mixed-signal blocks: Low-noise amplifiers, filters, mixers, LVRs, LDOs, VCO, ADC/DAC, etc.
Job Type:
Experienced Hire
Shift:
Shift 1 (United States of America)
Primary Location:
US, Oregon, Hillsboro
Additional Locations:
Business group:
Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $141,910.00-269,100.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
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About Intel

Intel
PublicIntel inside.
120,000+
Employees
Santa Clara
Headquarters
$200B
Valuation
Reviews
3.5
3 reviews
Work Life Balance
3.0
Compensation
3.0
Culture
2.5
Career
2.5
Management
2.0
25%
Recommend to a Friend
Pros
Offers internship opportunities
Interview opportunities available
Cons
Major job cuts and layoffs
Spam emails after rejection
Poor communication practices
Salary Ranges
6 data points
Senior/L5
Senior/L5 · Advanced Field Service Engineering Data Analyst
1 reports
$132,904
total / year
Base
$102,234
Stock
-
Bonus
-
$132,904
$132,904
Interview Experience
2 interviews
Difficulty
3.0
/ 5
Duration
14-28 weeks
Interview Process
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Onsite/Virtual Interviews
5
Team Matching
6
Offer
Common Questions
Coding/Algorithm
Technical Knowledge
Behavioral/STAR
System Design
Past Experience
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