Job Details:

Job Description:

About the Foundry Technology Development Group:

Foundry Technology Development (Foundry TD) is the heart and soul of Moore's Law at Intel, enabling Intel to create world-changing technology that enriches the lives of every person on earth. FTD employees drive breakthrough research, develop next generation process and packaging technologies, while also running high volume manufacturing operations in its state-of-the-art facilities.

The Design Technology Platform (DTP) team in Foundry TD works closely with the technology team to maximize the value proposition of the technology for our customers thru Design Technology Co-Optimization (DTCO) and delivers the Process Design Kits (PDKs) and Foundational IP (FIP) that designers need to support their product design work and fully leverage the technology. The DTP organization scope includes technology design rules and models, technology and IP testchips, Process Design Kits (PDKs) and Foundational IP. The FIP Platform team is responsible for defining FIP Platform requirements and performing Platform testing and FIP integration QA.

About the Role:

• The Foundational IP Group is responsible for developing leadership IPs that power winning products for our customers and for Intel.
• The Foundational IP Integration QA Lead will be a part of FIP Platform and QA team and will oversee the FIP integration QA progress across all nodes.
• The team will continuously improve our QA coverage by identifying QA gaps and work on improvement to get these filled.
• The team is tasked to improve efficiency by working with other DTP teams to identify and adopt best practices for QA automation and flows.
• The Foundation IP Integration QA Lead will also be the Timing Owner for Full Chip Reference Design Development that will be used in Platform QA.

Responsibilities Include:

• Track FIP platform and reference flow deliveries and QA requirements.
• Review FIP integration QA, identify gaps, and implement comprehensive QA checks with the FIP Platform and QA team.
• Continuously improve our FIP platform QA coverage by adding additional tests as needed and removing unnecessary tests to improve efficiency.
• Work with other DTP teams to identify and adopt best practices for QA automation and flows.
• Work closely with DA engineers to specify automation requirements and oversee automation solutions.
• Work with FIP Platform and QA team members to track and document our QA progress for all FIP releases.
• Work on Full Chip Reference Design Development as the Timing Owner.
• Drive technical collaboration with internal teams, and EDA vendors to resolve issues and improve design productivity and efficiency.

We invite you to bring your expertise to Intel and contribute to creating innovative QA methodology that redefine industry standards. Apply now to join us in shaping the future of semiconductor design.

Qualifications:

Minimum Qualifications:

• Bachelor of Science degree in Electronic, Electrical, or Computer Engineering, or equivalent, with a minimum of 8 years of experience in SoC, analog, IP, or ASIC design and/or methodology development.
• Proficiency in running synthesis, place-and-route tools, and physical design flows, with expertise in optimization, timing convergence, IR drop analysis, DRC fixes, and low-power checks.
• Proficiency in static timing analysis and constraints development.
• Experience completing the full RTL to GDS design cycle for SOCs and Testchips, including signoff and tapeout.
• Skilled in Unix/Linux environments and shell programming.
• Solid experience in reliability verification processes.

Preferred Qualifications:

• Master's degree in Electronic, Electrical, or Computer Engineering, or equivalent, with 6 years of relevant experience or a Ph.D. with 4 years of relevant experience.
• Familiarity with advanced process nodes and design methodologies.
• Expertise in scripting languages such as PERL and TCL for design automation.
• Strong problem-solving skills and ability to collaborate in a team-oriented environment.
• Strong self-initiative, persistence, and ability to deal with a high degree of ambiguity and task and deadline pressure.

Job Type:

Experienced Hire

Shift:

Shift 1 (Malaysia)

Primary Location:

Malaysia, Penang

Additional Locations:

Business group:

Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.