Senior Staff Engineer Analog Mixed-Signal Verification

Your Role

Key responsibilities in your new role

• Verification of complex So Cs / IPs and provide technical leadership to the team while creating test plans and test bench architecture.
• Development of constraint-random verification environment at both sub-system and SoC level.
• Develop expertise in multiple areas of verification – RTL, Gate level and Power aware simulations
• Drive verification closure on complex modules and So Cs using SV/UVM based methodology.
• Schedule management and handling cross functional team interactions
• Should be a good mentor and guide for junior engineers in the team

Your Profile

Qualifications and skills to help you succeed

• B.E./B.Tech/M.E./M.Tech in Electrical/Electronic Engineering Bachelor's - 9 to 11 years’ experience, Master’s - 8 to 10 years’ experience
• In depth understanding of ASIC verification concepts and techniques. Ability to architect complex module / sub system / full chip test benches and build verification infrastructure in SV/UVM.
• Should be a good mentor and guide the junior engineers in the team.
• Experience in ARM based SoC verification covering RTL, Power Aware and Gate level simulations is a plus.
• Good knowledge in industry standard protocols is preferable

Contact:
Vidhi Ashok.Thakkar@infineon.com

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