About Global Foundries:

Global Foundries (GF) is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. Our Advanced Packaging and Photonics Center (APPC) is at the forefront of enabling next-generation optical interconnects and heterogeneous integration (HI) for AI, HPC, and data center applications. With a global manufacturing footprint spanning three continents, Global Foundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com.

New College Graduates Overview:

We offer many full-time employment paths for recent graduates, which provide accelerated training in a fast-paced work environment, cross-functional working opportunities, and talent mobility. New college graduates are provided with mentorship, networking, and leadership opportunities, which give our new team members life-long connections and skills.​

Summary of Role:

This hands-on packaging assembly integration role will deliver industry leading electro-optical transceivers using GF’s Photonix platform and advanced packaging 2.5D and 3D co-packaged optics form factors meeting customer requirements. The candidate will bring a strong focus on tool process interactions for each assembly step in a Si Ph Flip Chip assembly. Focus on product and module reliability, package risk factors, packaging design rules, materials selection criteria, definition of electrical, photonic and thermal stress plan for chiplet and product module reliability qualifications.

A successful candidate would possess assembly expertise for photonic and electronic packages, with primary focus on the compatibility of photonic interconnect and packaging solutions with present state-of-the-art electrical interconnect solutions. It is expected that options for optical fiber attach will include detachable fiber optic couplers, grating couplers, edge couplers, passive V-groove, and 3D MEMs spot size converters which must be compatible with 3D electrical interconnect solutions including Copper RX, Copper u Pillar, chip-on-wafer hybrid bonding and wafer-to-wafer hybrid bonding.

Essential

Responsibilities:

• Define process integration specifications and manufacturing‑driven design rules for co‑packaged optics and Si Ph advanced packaging, optimizing cost, yield, and reliability.
• Lead packaging design reviews, materials selection, and FMEAs to ensure standardized quality expectations and prevent costly redesigns.
• Drive advanced packaging innovation, customer design enablement, and efficient manufacturing processes in partnership with internal teams and OSAT ecosystems.
• Identify and resolve process integration, technical, and yield issues through cross‑functional collaboration, project management, and data‑driven analysis.
• Develop characterization methods, test structures, and derivative processes to support new designs and meet customer requirements.
• Ensure global standardization of quality and qualification processes while driving continuous improvement plans (CIP) aligned to organizational goals.

Other Responsibilities:

• Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.

Required Qualifications:

• Education – Graduating Master’s or PhD in Electrical Engineering or related field from an accredited degree program.
• Experience – Internship or research experience in Photonics and Optical assembly.
• Must have at least an overall 3.0 GPA and proven good academic standing.
• Language Fluency
• English (Written & Verbal)

Preferred Qualifications:

• Strong foundation in materials science, thermal, mechanical, and simulation disciplines, with hands‑on experience in packaging process integration, DOE, and failure analysis.

• Proven experience in photonics, optical assembly, and photonic/electrical interconnects, including successful product releases within internal fabs and/or OSAT ecosystems.

• Deep expertise in chip‑package interaction across 2D, 2.5D, 3D, and 3.5D Si Ph advanced packaging architectures.

• Broad awareness of global technology and commercial trends in semiconductor design and manufacturing, with the ability to anticipate and support future technology directions.

• Prior related internship or co-op experience.

• Demonstrated prior leadership experience in the workplace, school projects, competitions, etc.

• Project management skills, i.e. the ability to innovate and execute solutions that matter; the ability to navigate ambiguity.

• Strong written and verbal communication skills

• Strong planning & organizational skills

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Expected Salary Range

$65,400.00 - $145,800.00

The exact Salary will be determined based on qualifications, experience and location.

If you need a reasonable accommodation for any part of the employment process, please contact us by email at usaccommodations@gf.com and let us know the nature of your request and your contact information. Requests for accommodation will be considered on a case-by-case basis. Please note that only inquiries concerning a request for reasonable accommodation will be responded to from this email address.

An offer with Global Foundries is conditioned upon the successful completion of pre-employment conditions, as applicable, and subject to applicable laws and regulations.

Global Foundries is fully committed to equal opportunity in the workplace and believes that cultural diversity within the company enhances its business potential. Global Foundries goal of excellence in business necessitates the attraction and retention of highly qualified people. Artificial barriers and stereotypic biases detract from this objective and may be illegally discriminatory.

All policies and processes which pertain to employees including recruitment, selection, training, utilization, promotion, compensation, benefits, extracurricular programs, and termination are created and implemented without regard to age, ethnicity, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, sexual orientation, gender identity or expression, veteran status, or any other characteristic or category specified by local, state or federal law