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Lead Application Engineer-Analog Design

Cadence

Lead Application Engineer-Analog Design

Cadence

YOKOHAMA

·

On-site

·

Full-time

·

1mo ago

Benefits & Perks

Health benefits

Parental leave

Remote options

Flexible work schedule

Creative environment

Competitive salary and equity

Healthcare

Parental Leave

Required Skills

Principle

Framer

Adobe Creative Suite

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

  • Customer support/consulting based on Virtuoso platform, Cadence's A/MS IC design environment.
  • Main product:Virtuoso Schematic Editor (VSE), Spectre Circuit Simulator
  • https://www.cadence.com/en_US/home/tools/custom-ic-analog-rf-design/circuit-design.html
  • *Qualification Requirements
  • Majored in Electrical Engineering or some other equivalent
  • Has the knowledge and desire to take on new challenges
  • *Experiences/Skills
  • At least 5 years of experience for A/MS IC circuit design and knowledge.
  • Having experiences of SPICE simulation / mixed-signal simulation.
  • Having experiences of signal integrity/power integrity analysis.
  • Having experiences of electromigration / IR drop analysis.
  • Having experiences of design rule/LVS(Layout vs Schematic)/parasitic extraction.
  • Having knowledge and experience of thermal analysis for IC design/PCB/package.
  • Programing experiences, such as Perl, Tcl, Python, SKILL etc.
  • Good organization and communication skills between difference groups and customers.
  • Communication skill and technical conversation in English.
  • Must have Japanese communication skill. English or Chinese is a plus.
  • Verilog-A/Verilog-AMS/System Verilog Real modeling experience is a plus.
  • Knowledge of 16nm (or beyond) process desirable.
  • Over 3 years of experience for A/MS design or product support as CAD engineer.

Experiences on Virtuoso or Spectre desirable:

We’re doing work that matters. Help us solve what others can’t.

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About Cadence

Cadence

Cadence

Public

Cadence Design Systems provides electronic design automation (EDA) software, hardware, and IP for designing and verifying electronic systems and semiconductors.

5,001-10,000

Employees

San Jose

Headquarters

Reviews

3.3

7 reviews

Work Life Balance

2.0

Compensation

2.5

Culture

1.8

Career

2.0

Management

1.5

15%

Recommend to a Friend

Pros

Built strong client relationships

Useful for repetitive tasks

Employment opportunities

Cons

Poor management and micromanagement

Lack of career growth opportunities

Technical architecture and code quality issues

Salary Ranges

65 data points

Junior/L3

Junior/L3 · Data Analyst

1 reports

$91,103

total / year

Base

$85,276

Stock

-

Bonus

$5,827

$59,612

$139,984

Interview Experience

1 interviews

Difficulty

3.0

/ 5

Duration

14-28 weeks

Interview Process

1

Application Review

2

Recruiter Screen

3

Technical Phone Screen

4

Onsite/Virtual Interviews

5

Final Decision

Common Questions

Technical Knowledge

Behavioral/STAR

Past Experience

Problem Solving