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JobsCadence

Lead Product Engineer

Cadence

Lead Product Engineer

Cadence

2 Locations

·

On-site

·

Full-time

·

1mo ago

Benefits & Perks

Generous paid time off and holidays

Professional development budget

Flexible work arrangements

Comprehensive health, dental, and vision insurance

401(k) matching

Learning

Flexible Hours

Healthcare

Required Skills

JavaScript

React

Python

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Product Engineer – Memory IP Products

Join a growing and dynamic IP team and help lead the proliferation of best-in-class Memory PHY IP products across a wider range of customers.  This is a tremendous opportunity to work with an experienced team focusing on development and support of high-performance IP related to memory protocols such as DDR/LPDDR/HBM/GDDR, and to engage with the technology sector’s top companies making an impact in our world.

The role will be a key member of technical staff in an organization responsible for activities including but not limited to pre-sales engagement with potential customers and post-sales technical support for integration, usage, and deployment of memory physical IP producs. This candidate will be the primary interface between customers, CDNS R&D and System Validation teams. Candidate should possess strong communication skills with ability to manage multiple priorities on a day-to-day basis. Ownership of tasks, ability to collaborate with remote teams located worldwide and clear oral and written communication skills are must-have attributes in this role.

  • Primary Responsibilities:

  •  Supporting pre-silicon integration, usage, and implementation of memory subsystem products

  •  Helping with internal system integration and QA testing of memory subsystem products (Controller PHY)

  •  Analyzing and resolving complex subsystem application or implementation issues and providing professional guidance to customers

  • Supporting various memory PHY and controller SOC integration reviews and implementation reviews

  •  Assisting customers with RTL and gate-level simulations to verify functionality

  •  Assisting customers with timing closure and other aspects of physical integration

  •  Participating in development and refinement of product documentation and checklists for customer applications

  •  Supporting post-silicon bringup and production test activities for customers as needed

  •  Enhancing customer experience by providing prompt, thorough, and technically accurate responses to customer questions

  • Leveraging AI-powered tools and assistants to enhance productivity, improve decision making, and maintain high-quality customer deliverables.

  •  Applying AI-powered analytics tools to extract insights, identify patterns, and generate actionable recommendations from complex datasets

  • Position Requirements:

  •  B.S Electrical/Computer Engineering (or similar degree)

  •  4 years of overall experience

  •  Experience working with DDR5/4/3, LPDDR5/4/3, HBM3, GDDR6 or similar IPs

  •  Verilog RTL design and gate level verification experience

  •  Synthesis and static timing analysis experience (physical implementation/verification experience is a plus)

  •  Familiarity with industry standard DFT flows and test methodologies.

  •  Familiarity with package and board design

  •  Ability to read schematics and participate in SI/PI reviews for customer board/package implementation

  • Preferred Qualifications

  •  Experience with Memory PHY and DSP based architecture

  •  Experience with embedded microcontroller FW

  •  M.S Electrical/Computer Engineering (or similar degree) and 7 years of overall experience

We’re doing work that matters. Help us solve what others can’t.

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About Cadence

Cadence

Cadence

Public

Cadence Design Systems provides electronic design automation (EDA) software, hardware, and IP for designing and verifying electronic systems and semiconductors.

5,001-10,000

Employees

San Jose

Headquarters

Reviews

3.3

7 reviews

Work Life Balance

2.0

Compensation

2.5

Culture

1.8

Career

2.0

Management

1.5

15%

Recommend to a Friend

Pros

Built strong client relationships

Useful for repetitive tasks

Employment opportunities

Cons

Poor management and micromanagement

Lack of career growth opportunities

Technical architecture and code quality issues

Salary Ranges

65 data points

Junior/L3

Junior/L3 · Data Analyst

1 reports

$91,103

total / year

Base

$85,276

Stock

-

Bonus

$5,827

$59,612

$139,984

Interview Experience

1 interviews

Difficulty

3.0

/ 5

Duration

14-28 weeks

Interview Process

1

Application Review

2

Recruiter Screen

3

Technical Phone Screen

4

Onsite/Virtual Interviews

5

Final Decision

Common Questions

Technical Knowledge

Behavioral/STAR

Past Experience

Problem Solving