招聘
Benefits & Perks
•Professional development budget
•Team events and activities
•401(k) matching
•Generous paid time off and holidays
•Parental leave
•Learning
•Parental Leave
Required Skills
PostgreSQL
TypeScript
React
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.
Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Job Title: Lead Application Engineer
Location: Tampere, Finland
Reports to: AE Director
Job Overview: This Digital IC design and support role offers an opportunity to work on a variety of digital implementation and support activities associated with Cadence EDA tools for Synthesis, Logical Equivalency Checking (LEC), Design-for-Test (DFT), Place & Route and Static Timing Analysis (STA).You may get involved in design services projects and/or supporting customers using Cadence tools on their projects in areas such as 5G, IOT, automotive, advanced CPU, wireless, audio, image processing, AI, machine learning etc.
This role is ideal for someone with several years of hands on ASIC/IC design experience who is looking for a new challenge in an absorbing customer facing role. This role requires strong technical capability in Cadence tools (or similar), flow development, and the ability to think outside of the box.
Job Responsibilities:
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Support customers using Cadence EDA software in one or more of these areas:
Synthesis, DFT, Logical Equivalency Checking
Low Power Design Implementation, SDC Verification
Place and Route
Parasitic Extraction, Timing Signoff, Power Signoff -
Be the primary focal point for technical issues, questions, and discussions for a given customer engagement
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Lead technical discussions with customers and be the primary technical interface between customer and Cadence R&D. Capable of influencing outcomes among customers, R&D and Cadence technical team members.
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Develop an understanding of the customer's needs and also of the competition's technology and sales strategies.
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Perform methodology assessments, improve existing design methodologies, and develop new ones that leverage Cadence technology and services.
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Create and conduct technical presentations and product demonstrations to customers
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Requires on-site visits and some travel
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Good team player, help mentor other AEs
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Good consulting/client skills. Deliver results with minimal day-to-day guidance. Self-motivated.
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Review, document and resolve project technical issues. Escalation of issues to Project Management when appropriate
Job Qualifications:
- MS in Electronics Engineering with minimum 5+ years industry related experience in design and/or EDA
- 4+ years of experience in Synthesis (Genus or Design Compiler), DFT and Logic Equivalency tools Or Cadence or Synopsys place and route tools (Physical Synthesis, PnR, CTS, Static Timing Analysis)
- Debug and resolve complicated PPA, Low Power implementation and TAT issues.
- Exceptional troubleshooting and analytical skills
- Excellent command in scripting languages such as Perl, Tcl and shell scripting essentials
- Strong problem solving & analysis skills covering digital implementation
- Proven track record and experience working in a fast-paced environment
- Excellent customer interaction & presentation skills
Cadence is committed to equal employment opportunity and employment equity throughout all levels of the organization. We strive to attract a qualified and diverse candidate pool and encourage diversity and inclusion in the workplace.
We’re doing work that matters. Help us solve what others can’t.
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About Cadence

Cadence
PublicCadence Design Systems provides electronic design automation (EDA) software, hardware, and IP for designing and verifying electronic systems and semiconductors.
5,001-10,000
Employees
San Jose
Headquarters
Reviews
3.3
7 reviews
Work Life Balance
2.0
Compensation
2.5
Culture
1.8
Career
2.0
Management
1.5
15%
Recommend to a Friend
Pros
Built strong client relationships
Useful for repetitive tasks
Employment opportunities
Cons
Poor management and micromanagement
Lack of career growth opportunities
Technical architecture and code quality issues
Salary Ranges
65 data points
Junior/L3
Junior/L3 · Data Analyst
1 reports
$91,103
total / year
Base
$85,276
Stock
-
Bonus
$5,827
$59,612
$139,984
Interview Experience
1 interviews
Difficulty
3.0
/ 5
Duration
14-28 weeks
Interview Process
1
Application Review
2
Recruiter Screen
3
Technical Phone Screen
4
Onsite/Virtual Interviews
5
Final Decision
Common Questions
Technical Knowledge
Behavioral/STAR
Past Experience
Problem Solving
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