热门公司

招聘

职位Cadence

Principal Product Engineer (Analog Design Automation)

Cadence

Principal Product Engineer (Analog Design Automation)

Cadence

SAN JOSE

·

On-site

·

Full-time

·

2w ago

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

We are looking for a Product Engineer to drive the development and customer adoption of Virtuoso AI‑driven Layout Automation flows.

This is a customer‑facing role that sits at the intersection of analog layout expertise, automation technology, and customer workflows, and plays a critical role in scaling next‑generation Virtuoso automation flows.

We are looking for highly motivated and self‑driven engineers with:

  • Strong hands‑on experience with analog / mixed‑signal layout

  • Deep familiarity with the Virtuoso Custom Design Platform

  • Exposure to layout automation, migration, or constraint‑driven flows

  • Proven ability to work directly with customers, understand use‑cases, and articulate technical concepts clearly

  • Scripting experience is a plus

  • BS/MS degree in Electrical/Computer Engineering (or related degree) with at least 5 years of relevant experience

The annual salary range for California is $136,500 to $253,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

总浏览量

2

申请点击数

0

模拟申请者数

0

收藏

0

关于Cadence

Cadence

Cadence

Public

Cadence Design Systems provides electronic design automation (EDA) software, hardware, and IP for designing and verifying electronic systems and semiconductors.

5,001-10,000

员工数

San Jose

总部位置

$8.5B

企业估值

评价

3.3

7条评价

工作生活平衡

2.0

薪酬

2.5

企业文化

1.8

职业发展

2.0

管理层

1.5

15%

推荐给朋友

优点

Built strong client relationships

Useful for repetitive tasks

Employment opportunities

缺点

Poor management and micromanagement

Lack of career growth opportunities

Technical architecture and code quality issues

薪资范围

65个数据点

Junior/L3

Junior/L3 · Data Analyst

1份报告

$91,103

年薪总额

基本工资

$85,276

股票

-

奖金

$5,827

$59,612

$139,984

面试经验

1次面试

难度

3.0

/ 5

时长

14-28周

面试流程

1

Application Review

2

Recruiter Screen

3

Technical Phone Screen

4

Onsite/Virtual Interviews

5

Final Decision

常见问题

Technical Knowledge

Behavioral/STAR

Past Experience

Problem Solving